* Most of this code is taken from 74xx_7xx/cache.S
* and then cleaned up a bit
*/
-
+
/*
* Invalidate L1 instruction cache.
*/
/*
* Flush data cache.
*/
-_GLOBAL(flush_data_cache)
+_GLOBAL(flush_dcache)
lis r3,0
lis r5,CACHE_LINE_SIZE
flush:
* Disable L1 Instruction cache
*/
_GLOBAL(icache_disable)
+ mflr r4
+ bl invalidate_l1_instruction_cache /* uses r3 */
+ sync
+ mtlr r4
mfspr r3, HID0
li r5, 0
ori r5, r5, HID0_ICE
mtspr HID0, r5 /* enable + invalidate */
mtspr HID0, r3 /* enable */
sync
-#ifdef CFG_L2
+#ifdef CONFIG_SYS_L2
mflr r5
bl l2cache_enable /* uses r3 and r4 */
sync
/*
* Disable data cache(s) - L1 and optionally L2
- * Calls flush_data_cache and l2cache_disable_no_flush.
+ * Calls flush_dcache and l2cache_disable_no_flush.
* LR saved in r4
*/
_GLOBAL(dcache_disable)
mflr r4 /* save link register */
- bl flush_data_cache /* uses r3 and r5 */
+ bl flush_dcache /* uses r3 and r5 */
sync
mfspr r3, HID0
li r5, HID0_DCFI|HID0_DLOCK
andc r3, r3, r5 /* no enable, no invalidate */
mtspr HID0, r3
sync
-#ifdef CFG_L2
+#ifdef CONFIG_SYS_L2
bl l2cache_disable_no_flush /* uses r3 */
#endif
mtlr r4 /* restore link register */
blr
/*
- * Invalidate L2 cache using L2I and polling L2IP
+ * Invalidate L2 cache using L2I, assume L2 is enabled
*/
_GLOBAL(l2cache_invalidate)
- sync
- oris r3, r3, L2CR_L2I@h
+ mfspr r3, l2cr
+ rlwinm. r3, r3, 0, 0, 0
+ beq 1f
+
+ mfspr r3, l2cr
+ rlwinm r3, r3, 0, 1, 31
+
+#ifdef CONFIG_ALTIVEC
+ dssall
+#endif
sync
mtspr l2cr, r3
sync
+1: mfspr r3, l2cr
+ oris r3, r3, L2CR_L2I@h
+ mtspr l2cr, r3
+
invl2:
mfspr r3, l2cr
- andi. r3, r3, L2CR_L2IP
+ andis. r3, r3, L2CR_L2I@h
bne invl2
- /* turn off the global invalidate bit */
- mfspr r3, l2cr
- rlwinm r3, r3, 0, 11, 9
- sync
- mtspr l2cr, r3
- sync
blr
/*
/*
* Disable L2 cache
- * Calls flush_data_cache. LR is saved in r4
+ * Calls flush_dcache. LR is saved in r4
*/
_GLOBAL(l2cache_disable)
mflr r4 /* save link register */
- bl flush_data_cache /* uses r3 and r5 */
+ bl flush_dcache /* uses r3 and r5 */
sync
mtlr r4 /* restore link register */
l2cache_disable_no_flush: /* provide way to disable L2 w/o flushing */