Merge branch 'master' of git://git.denx.de/u-boot-arm

[u-boot] / cpu / mpc86xx / cpu.c

diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index d47cc5ef3a98dce375ef6e213d15372829ee7479..f7e012db573cc0f795291f32dd3b2b9fae0c89c3 100644 (file)
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006 Freescale Semiconductor
+ * Copyright 2006,2009 Freescale Semiconductor, Inc.
  * Jeff Brown
  * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
  *
@@ -28,9 +28,9 @@
 #include <asm/cache.h>
 #include <asm/mmu.h>
 #include <mpc86xx.h>
-#include <tsec.h>
 #include <asm/fsl_law.h>
 
+DECLARE_GLOBAL_DATA_PTR;
 
 /*
  * Default board reset function
@@ -53,6 +53,7 @@ checkcpu(void)
        char buf1[32], buf2[32];
        volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
+       struct cpu_type *cpu;
        uint msscr0 = mfspr(MSSCR0);
 
        svr = get_svr();
@@ -60,22 +61,18 @@ checkcpu(void)
        major = SVR_MAJ(svr);
        minor = SVR_MIN(svr);
 
+       if (cpu_numcores() > 1) {
+#ifndef CONFIG_MP
+               puts("Unicore software on multiprocessor system!!\n"
+                    "To enable mutlticore build define CONFIG_MP\n");
+#endif
+       }
        puts("CPU:   ");
 
-       switch (ver) {
-       case SVR_8641:
-               puts("8641");
-               break;
-       case SVR_8641D:
-               puts("8641D");
-               break;
-       case SVR_8610:
-               puts("8610");
-               break;
-       default:
-               puts("Unknown");
-               break;
-       }
+       cpu = gd->cpu;
+
+       puts(cpu->name);
+
        printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr);
        puts("Core:  ");
 
@@ -177,61 +174,6 @@ watchdog_reset(void)
 }
 #endif /* CONFIG_WATCHDOG */
 
-
-#if defined(CONFIG_DDR_ECC)
-void
-dma_init(void)
-{
-       volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
-       volatile fsl_dma_t *dma = &dma_base->dma[0];
-
-       dma->satr = 0x00040000;
-       dma->datr = 0x00040000;
-       dma->sr = 0xffffffff; /* clear any errors */
-       asm("sync; isync");
-}
-
-uint
-dma_check(void)
-{
-       volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
-       volatile fsl_dma_t *dma = &dma_base->dma[0];
-       volatile uint status = dma->sr;
-
-       /* While the channel is busy, spin */
-       while ((status & 4) == 4) {
-               status = dma->sr;
-       }
-
-       /* clear MR[CS] channel start bit */
-       dma->mr &= 0x00000001;
-       asm("sync;isync");
-
-       if (status != 0) {
-               printf("DMA Error: status = %x\n", status);
-       }
-       return status;
-}
-
-int
-dma_xfer(void *dest, uint count, void *src)
-{
-       volatile ccsr_dma_t *dma_base = (void *)(CONFIG_SYS_MPC86xx_DMA_ADDR);
-       volatile fsl_dma_t *dma = &dma_base->dma[0];
-
-       dma->dar = (uint) dest;
-       dma->sar = (uint) src;
-       dma->bcr = count;
-       dma->mr = 0xf000004;
-       asm("sync;isync");
-       dma->mr = 0xf000005;
-       asm("sync;isync");
-       return dma_check();
-}
-
-#endif /* CONFIG_DDR_ECC */
-
-
 /*
  * Print out the state of various machine registers.
  * Currently prints out LAWs, BR0/OR0, and BATs
@@ -255,16 +197,3 @@ void mpc86xx_reginfo(void)
        printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", in_be32(&lbc->br7), in_be32(&lbc->or7));
 
 }
-
-/*
- * Initializes on-chip ethernet controllers.
- * to override, implement board_eth_init()
- */
-int cpu_eth_init(bd_t *bis)
-{
-#if defined(CONFIG_TSEC_ENET)
-       tsec_standard_init(bis);
-#endif
-
-       return 0;
-}