Merge branch 'master' of git://git.denx.de/u-boot-arm

[u-boot] / cpu / mpc86xx / start.S

diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 60af3dd712835d27934173615efdaca486b55cd8..e65f1c0649ac689b76203746420631c113af0221 100644 (file)
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -32,6 +32,7 @@
  */
 #include <config.h>
 #include <mpc86xx.h>
+#include <timestamp.h>
 #include <version.h>
 
 #include <ppc_asm.tmpl>
@@ -76,7 +77,7 @@
        .globl  version_string
 version_string:
        .ascii  U_BOOT_VERSION
-       .ascii  " (", __DATE__, " - ", __TIME__, ")"
+       .ascii  " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
        .ascii  CONFIG_IDENT_STRING, "\0"
 
        . = EXC_OFF_SYS_RESET
@@ -209,11 +210,6 @@ boot_warm:
        sync
 #endif
 
-#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
-       /* setup ccsrbar now while we're in real mode */
-       bl      setup_ccsrbar
-#endif
-
        /*
         * Calculate absolute address in FLASH and jump there
         *------------------------------------------------------*/
@@ -267,6 +263,10 @@ addr_trans_enabled:
        sync
 #endif
 
+#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+       bl      setup_ccsrbar
+#endif
+
        /* set up the stack pointer in our newly created
         * cache-ram (r1) */
        lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
@@ -285,7 +285,7 @@ addr_trans_enabled:
 #ifdef RUN_DIAG
 
        /* Load PX_AUX register address in r4 */
-       lis     r4, 0xf810
+       lis     r4, PIXIS_BASE@h
        ori     r4, r4, 0x6
        /* Load contents of PX_AUX in r3 bits 24 to 31*/
        lbz     r3, 0(r4)
@@ -414,6 +414,26 @@ early_bats:
        mtspr   DBAT6L, r4
        mtspr   DBAT6U, r3
        isync
+
+#if(CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)
+       /* IBAT 7 */
+       lis     r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@h
+       ori     r4, r4, CONFIG_SYS_CCSR_DEFAULT_IBATL@l
+       lis     r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@h
+       ori     r3, r3, CONFIG_SYS_CCSR_DEFAULT_IBATU@l
+       mtspr   IBAT7L, r4
+       mtspr   IBAT7U, r3
+       isync
+
+       /* DBAT 7 */
+       lis     r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@h
+       ori     r4, r4, CONFIG_SYS_CCSR_DEFAULT_DBATL@l
+       lis     r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@h
+       ori     r3, r3, CONFIG_SYS_CCSR_DEFAULT_DBATU@l
+       mtspr   DBAT7L, r4
+       mtspr   DBAT7U, r3
+       isync
+#endif
        blr
 
        .globl clear_tlbs
@@ -713,15 +733,17 @@ in_ram:
        sub     r11,r3,r11
        addi    r3,r3,-4
 1:     lwzu    r0,4(r3)
+       cmpwi   r0,0
+       beq-    2f
        add     r0,r0,r11
        stw     r0,0(r3)
-       bdnz    1b
+2:     bdnz    1b
 
        /*
         * Now adjust the fixups and the pointers to the fixups
         * in case we need to move ourselves again.
         */
-2:     li      r0,__fixup_entries@sectoff@l
+       li      r0,__fixup_entries@sectoff@l
        lwz     r3,GOT(_FIXUP_TABLE_)
        cmpwi   r0,0
        mtctr   r0
@@ -860,17 +882,20 @@ setup_ccsrbar:
        lis     r4, CONFIG_SYS_CCSRBAR_DEFAULT@h
        ori     r4, r4, CONFIG_SYS_CCSRBAR_DEFAULT@l
 
-       lis     r5, CONFIG_SYS_CCSRBAR@h
-       ori     r5, r5, CONFIG_SYS_CCSRBAR@l
-       srwi    r6,r5,12
-       stw     r6, 0(r4)
+       lis     r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@h
+       ori     r5, r5, CONFIG_SYS_CCSRBAR_PHYS_LOW@l
+       srwi    r5,r5,12
+       li      r6, CONFIG_SYS_CCSRBAR_PHYS_HIGH@l
+       rlwimi  r5,r6,20,8,11
+       stw     r5, 0(r4) /* Store physical value of CCSR */
        isync
 
-       lis     r5, 0xffff
-       ori     r5,r5,0xf000
+       lis     r5, TEXT_BASE@h
+       ori     r5,r5,TEXT_BASE@l
        lwz     r5, 0(r5)
        isync
 
+       /* Use VA of CCSR to do read */
        lis     r3, CONFIG_SYS_CCSRBAR@h
        lwz     r5, CONFIG_SYS_CCSRBAR@l(r3)
        isync
@@ -959,5 +984,3 @@ unlock_ram_in_cache:
        blr
 #endif
 #endif
-
-