Sync'd u-boot-net with mainline

[u-boot] / cpu / ppc4xx / 405gp_pci.c

diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 64431ab13a450ca54d1f561085d0ff20728481c7..28379298b72a9f7a19be590b8c26fe9ae08ba0c4 100644 (file)
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -77,9 +77,25 @@
 #include <asm/processor.h>
 #include <pci.h>
 
+#ifdef CONFIG_PCI
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Board-specific pci initialization
+ * Platform code can reimplement pci_pre_init() if needed
+ */
+int __pci_pre_init(struct pci_controller *hose)
+{
+       return 1;
+}
+int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));
+
 #if defined(CONFIG_405GP) || defined(CONFIG_405EP)
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PMC405)
+ushort pmc405_pci_subsys_deviceid(void);
+#endif
 
 /*#define DEBUG*/
 
@@ -88,21 +104,16 @@
  *-----------------------------------------------------------------------------*/
 void pci_405gp_init(struct pci_controller *hose)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        int i, reg_num = 0;
        bd_t *bd = gd->bd;
 
        unsigned short temp_short;
        unsigned long ptmpcila[2] = {CFG_PCI_PTM1PCI, CFG_PCI_PTM2PCI};
 #if defined(CONFIG_CPCI405) || defined(CONFIG_PMC405)
-       unsigned long ptmla[2]    = {bd->bi_memstart, bd->bi_flashstart};
-       unsigned long ptmms[2]    = {~(bd->bi_memsize - 1) | 1, ~(bd->bi_flashsize - 1) | 1};
        char *ptmla_str, *ptmms_str;
-#else
+#endif
        unsigned long ptmla[2]    = {CFG_PCI_PTM1LA, CFG_PCI_PTM2LA};
        unsigned long ptmms[2]    = {CFG_PCI_PTM1MS, CFG_PCI_PTM2MS};
-#endif
 #if defined(CONFIG_PIP405) || defined (CONFIG_MIP405)
        unsigned long pmmla[3]    = {0x80000000, 0xA0000000, 0};
        unsigned long pmmma[3]    = {0xE0000001, 0xE0000001, 0};
@@ -190,6 +201,13 @@ void pci_405gp_init(struct pci_controller *hose)
        if (hose->pci_fb)
                pciauto_region_init(hose->pci_fb);
 
+       /* Let board change/modify hose & do initial checks */
+       if (pci_pre_init (hose) == 0) {
+               printf("PCI: Board-specific initialization failed.\n");
+               printf("PCI: Configuration aborted.\n");
+               return;
+       }
+
        pci_register_hose(hose);
 
        /*--------------------------------------------------------------------------+
@@ -314,7 +332,6 @@ void pci_405gp_init(struct pci_controller *hose)
 #ifdef CONFIG_PCI_SCAN_SHOW
                printf("PCI:   Bus Dev VenId DevId Class Int\n");
 #endif
-
                hose->last_busno = pci_hose_scan(hose);
        }
 #endif  /* CONFIG_PCI_PNP */
@@ -372,7 +389,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
 {
        unsigned int cmdstat = 0;
 
-       pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
+       pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
 
        /* always enable io space on vga boards */
        pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
@@ -380,7 +397,7 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev,
        pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
 }
 
-#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405))
+#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) && !(defined (CONFIG_SC3))
 
 /*
  *As is these functs get called out of flash Not a horrible
@@ -416,14 +433,12 @@ void pci_init_board(void)
 
 #endif
 
-#endif /* CONFIG_PCI */
-
 #endif /* CONFIG_405GP */
 
 /*-----------------------------------------------------------------------------+
  * CONFIG_440
  *-----------------------------------------------------------------------------*/
-#if defined(CONFIG_440) && defined(CONFIG_PCI)
+#if defined(CONFIG_440)
 
 static struct pci_controller ppc440_hose = {0};
 
@@ -437,7 +452,7 @@ void pci_440_init (struct pci_controller *hose)
         * The PCI initialization sequence enable bit must be set ... if not abort
         * pci setup since updating the bit requires chip reset.
         *--------------------------------------------------------------------------*/
-#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP) || defined(CONFIG_440SPE)
        unsigned long strap;
 
        mfsdr(sdr_sdstp1,strap);
@@ -464,29 +479,44 @@ void pci_440_init (struct pci_controller *hose)
        hose->first_busno = 0;
        hose->last_busno = 0xff;
 
+       /* PCI I/O space */
        pci_set_region(hose->regions + reg_num++,
                       0x00000000,
                       PCIX0_IOBASE,
                       0x10000,
                       PCI_REGION_IO);
 
+       /* PCI memory space */
        pci_set_region(hose->regions + reg_num++,
                       CFG_PCI_TARGBASE,
                       CFG_PCI_MEMBASE,
+#ifdef CFG_PCI_MEMSIZE
+                      CFG_PCI_MEMSIZE,
+#else
                       0x10000000,
+#endif
                       PCI_REGION_MEM );
+
+#if defined(CONFIG_PCI_SYS_MEM_BUS) && defined(CONFIG_PCI_SYS_MEM_PHYS) && \
+       defined(CONFIG_PCI_SYS_MEM_SIZE)
+       /* System memory space */
+       pci_set_region(hose->regions + reg_num++,
+                      CONFIG_PCI_SYS_MEM_BUS,
+                      CONFIG_PCI_SYS_MEM_PHYS,
+                      CONFIG_PCI_SYS_MEM_SIZE,
+                      PCI_REGION_MEM | PCI_REGION_MEMORY );
+#endif
+
        hose->region_count = reg_num;
 
        pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
 
-#if defined(CFG_PCI_PRE_INIT)
        /* Let board change/modify hose & do initial checks */
        if (pci_pre_init (hose) == 0) {
                printf("PCI: Board-specific initialization failed.\n");
                printf("PCI: Configuration aborted.\n");
                return;
        }
-#endif
 
        pci_register_hose( hose );
 
@@ -501,7 +531,7 @@ void pci_440_init (struct pci_controller *hose)
        out16r( PCIX0_CLS, 0x00060000 ); /* Bridge, host bridge */
 #endif
 
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SPE)
        out32r( PCIX0_BRDGOPT1, 0x04000060 );               /* PLB Rq pri highest   */
        out32r( PCIX0_BRDGOPT2, in32(PCIX0_BRDGOPT2) | 0x83 ); /* Enable host config, clear Timeout, ensure int src1  */
 #elif defined(PCIX0_BRDGOPT1)
@@ -519,8 +549,13 @@ void pci_440_init (struct pci_controller *hose)
        out32r( PCIX0_POM0SA, 0 ); /* disable */
        out32r( PCIX0_POM1SA, 0 ); /* disable */
        out32r( PCIX0_POM2SA, 0 ); /* disable */
+#if defined(CONFIG_440SPE)
+       out32r( PCIX0_POM0LAL, 0x10000000 );
+       out32r( PCIX0_POM0LAH, 0x0000000c );
+#else
        out32r( PCIX0_POM0LAL, 0x00000000 );
        out32r( PCIX0_POM0LAH, 0x00000003 );
+#endif
        out32r( PCIX0_POM0PCIAL, CFG_PCI_MEMBASE );
        out32r( PCIX0_POM0PCIAH, 0x00000000 );
        out32r( PCIX0_POM0SA, 0xf0000001 ); /* 256MB, enabled */
@@ -537,17 +572,21 @@ void pci_440_init (struct pci_controller *hose)
 #ifdef CONFIG_PCI_SCAN_SHOW
                printf("PCI:   Bus Dev VenId DevId Class Int\n");
 #endif
-#if !defined(CONFIG_440EP) && !defined(CONFIG_440GR)
+#if !defined(CONFIG_440EP) && !defined(CONFIG_440GR) && \
+    !defined(CONFIG_440EPX) && !defined(CONFIG_440GRX)
                out16r( PCIX0_CMD, in16r( PCIX0_CMD ) | PCI_COMMAND_MASTER);
 #endif
                hose->last_busno = pci_hose_scan(hose);
        }
 }
 
-
 void pci_init_board(void)
 {
        pci_440_init (&ppc440_hose);
+#if defined(CONFIG_440SPE)
+       pcie_setup_hoses();
+#endif
 }
 
-#endif /* CONFIG_440 & CONFIG_PCI */
+#endif /* CONFIG_440 */
+#endif /* CONFIG_PCI */