Merge branch 'asm-generic' of git://git.denx.de/u-boot-microblaze

[u-boot] / cpu / ppc4xx / cpu.c

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 54cc25679754cea6683e05b6704fe373563c7587..fb3837c3df7befa480a7fc2ad30b180e41c49019 100644 (file)
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -36,11 +36,25 @@
 #include <command.h>
 #include <asm/cache.h>
 #include <ppc4xx.h>
+#include <netdev.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 void board_reset(void);
 
+/*
+ * To provide an interface to detect CPU number for boards that support
+ * more then one CPU, we implement the "weak" default functions here.
+ *
+ * Returns CPU number
+ */
+int __get_cpu_num(void)
+{
+       return NA_OR_UNKNOWN_CPU;
+}
+int get_cpu_num(void) __attribute__((weak, alias("__get_cpu_num")));
+
+#if defined(CONFIG_PCI)
 #if defined(CONFIG_405GP) || \
     defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
@@ -63,6 +77,7 @@ static int pci_async_enabled(void)
 #endif
 }
 #endif
+#endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI) && !defined(CONFIG_IOP480) && \
     !defined(CONFIG_405) && !defined(CONFIG_405EX)
@@ -184,6 +199,19 @@ static char *bootstrap_str[] = {
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
 
+#if defined(CONFIG_460SX)
+#define SDR0_PINSTP_SHIFT      29
+static char *bootstrap_str[] = {
+       "EBC (8 bits)",
+       "EBC (16 bits)",
+       "EBC (32 bits)",
+       "NAND (8 bits)",
+       "I2C (Addr 0x54)",      /* A8 */
+       "I2C (Addr 0x52)",      /* A4 */
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G' };
+#endif
+
 #if defined(CONFIG_405EZ)
 #define SDR0_PINSTP_SHIFT      28
 static char *bootstrap_str[] = {
@@ -261,12 +289,21 @@ int checkcpu (void)
 #if !defined(CONFIG_IOP480)
        char addstr[64] = "";
        sys_info_t sys_info;
+       int cpu_num;
 
-       puts ("CPU:   ");
+       cpu_num = get_cpu_num();
+       if (cpu_num >= 0)
+               printf("CPU%d:  ", cpu_num);
+       else
+               puts("CPU:   ");
 
        get_sys_info(&sys_info);
 
+#if defined(CONFIG_XILINX_440)
+       puts("IBM PowerPC 4");
+#else
        puts("AMCC PowerPC 4");
+#endif
 
 #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || \
     defined(CONFIG_405EP) || defined(CONFIG_405EZ) || \
@@ -346,6 +383,26 @@ int checkcpu (void)
                strcpy(addstr, "No Security support");
                break;
 
+       case PVR_405EX1_RC:
+               puts("EX Rev. C");
+               strcpy(addstr, "Security support");
+               break;
+
+       case PVR_405EX2_RC:
+               puts("EX Rev. C");
+               strcpy(addstr, "No Security support");
+               break;
+
+       case PVR_405EXR1_RC:
+               puts("EXr Rev. C");
+               strcpy(addstr, "Security support");
+               break;
+
+       case PVR_405EXR2_RC:
+               puts("EXr Rev. C");
+               strcpy(addstr, "No Security support");
+               break;
+
 #if defined(CONFIG_440)
        case PVR_440GP_RB:
                puts("GP Rev. B");
@@ -489,6 +546,30 @@ int checkcpu (void)
                strcpy(addstr, "Security/Kasumi support");
                break;
 
+       case PVR_460SX_RA:
+               puts("SX Rev. A");
+               strcpy(addstr, "Security support");
+               break;
+
+       case PVR_460SX_RA_V1:
+               puts("SX Rev. A");
+               strcpy(addstr, "No Security support");
+               break;
+
+       case PVR_460GX_RA:
+               puts("GX Rev. A");
+               strcpy(addstr, "Security support");
+               break;
+
+       case PVR_460GX_RA_V1:
+               puts("GX Rev. A");
+               strcpy(addstr, "No Security support");
+               break;
+
+       case PVR_VIRTEX5:
+               puts("x5 VIRTEX5");
+               break;
+
        default:
                printf (" UNKNOWN (PVR=%08x)", pvr);
                break;
@@ -507,14 +588,18 @@ int checkcpu (void)
 #endif /* I2C_BOOTROM */
 #if defined(SDR0_PINSTP_SHIFT)
        printf ("       Bootstrap Option %c - ", bootstrap_char[bootstrap_option()]);
-       printf ("Boot ROM Location %s\n", bootstrap_str[bootstrap_option()]);
+       printf ("Boot ROM Location %s", bootstrap_str[bootstrap_option()]);
+#ifdef CONFIG_NAND_U_BOOT
+       puts(", booting from NAND");
+#endif /* CONFIG_NAND_U_BOOT */
+       putc('\n');
 #endif /* SDR0_PINSTP_SHIFT */
 
 #if defined(CONFIG_PCI) && !defined(CONFIG_405EX)
        printf ("       Internal PCI arbiter %sabled", pci_arbiter_enabled() ? "en" : "dis");
 #endif
 
-#if defined(PCI_ASYNC)
+#if defined(CONFIG_PCI) && defined(PCI_ASYNC)
        if (pci_async_enabled()) {
                printf (", PCI async ext clock used");
        } else {
@@ -568,14 +653,14 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #if defined(CONFIG_BOARD_RESET)
        board_reset();
 #else
-#if defined(CFG_4xx_RESET_TYPE)
-       mtspr(dbcr0, CFG_4xx_RESET_TYPE << 28);
+#if defined(CONFIG_SYS_4xx_RESET_TYPE)
+       mtspr(dbcr0, CONFIG_SYS_4xx_RESET_TYPE << 28);
 #else
        /*
         * Initiate system reset in debug control register DBCR
         */
        mtspr(dbcr0, 0x30000000);
-#endif /* defined(CFG_4xx_RESET_TYPE) */
+#endif /* defined(CONFIG_SYS_4xx_RESET_TYPE) */
 #endif /* defined(CONFIG_BOARD_RESET) */
 
        return 1;
@@ -615,3 +700,15 @@ void reset_4xx_watchdog(void)
        mtspr(tsr, 0x40000000);
 }
 #endif /* CONFIG_WATCHDOG */
+
+/*
+ * Initializes on-chip ethernet controllers.
+ * to override, implement board_eth_init()
+ */
+int cpu_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_PPC4xx_EMAC)
+       ppc_4xx_eth_initialize(bis);
+#endif
+       return 0;
+}