Merge branch 'next'

[u-boot] / cpu / ppc4xx / fdt.c

diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c
index ccc73d5d64e6d6de50bfe98d9dc56cd759252ad6..a97484fa74ee34123126fcdf89888fabfd3f5740 100644 (file)
--- a/cpu/ppc4xx/fdt.c
+++ b/cpu/ppc4xx/fdt.c
@@ -47,8 +47,16 @@ void __ft_board_setup(void *blob, bd_t *bd)
        val[1] = 0;                             /* always 0 */
        val[2] = gd->bd->bi_flashstart;
        val[3] = gd->bd->bi_flashsize;
-       rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
-                                 val, sizeof(val), 1);
+       if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0) {
+               rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
+                                         val, sizeof(val), 1);
+       } else {
+               /*
+                * Some 405 PPC's have EBC as direct PLB child in the dts
+                */
+               rc = fdt_find_and_setprop(blob, "/plb/ebc", "ranges",
+                                         val, sizeof(val), 1);
+       }
        if (rc)
                printf("Unable to update property NOR mapping, err=%s\n",
                       fdt_strerror(rc));
@@ -122,7 +130,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
         * Fixup all ethernet nodes
         * Note: aliases in the dts are required for this
         */
-       fdt_fixup_ethernet(blob, bd);
+       fdt_fixup_ethernet(blob);
 
        /*
         * Fixup all available PCIe nodes by setting the device_type property