ppc/85xx: add cpu init config file for boot from NAND

[u-boot] / cpu / ppc4xx / interrupts.c

diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c
index 58d1d81c7db4f49ae677013e3606c738bf448cfe..6db84210b8d0a37b744d7041733783a1cdc1b5c6 100644 (file)
--- a/cpu/ppc4xx/interrupts.c
+++ b/cpu/ppc4xx/interrupts.c
@@ -102,15 +102,15 @@ int interrupt_init_cpu (unsigned *decrementer_count)
         * Init PIT
         */
 #if defined(CONFIG_440)
-       val = mfspr( tcr );
+       val = mfspr( SPRN_TCR );
        val &= (~0x04400000);           /* clear DIS & ARE */
-       mtspr( tcr, val );
-       mtspr( dec, 0 );                /* Prevent exception after TSR clear*/
-       mtspr( decar, 0 );              /* clear reload */
-       mtspr( tsr, 0x08000000 );       /* clear DEC status */
+       mtspr( SPRN_TCR, val );
+       mtspr( SPRN_DEC, 0 );           /* Prevent exception after TSR clear*/
+       mtspr( SPRN_DECAR, 0 );         /* clear reload */
+       mtspr( SPRN_TSR, 0x08000000 );  /* clear DEC status */
        val = gd->bd->bi_intfreq/1000;  /* 1 msec */
-       mtspr( decar, val );            /* Set auto-reload value */
-       mtspr( dec, val );              /* Set inital val */
+       mtspr( SPRN_DECAR, val );               /* Set auto-reload value */
+       mtspr( SPRN_DEC, val );         /* Set inital val */
 #else
        set_pit(gd->bd->bi_intfreq / 1000);
 #endif
@@ -126,9 +126,9 @@ int interrupt_init_cpu (unsigned *decrementer_count)
        /*
         * Enable PIT
         */
-       val = mfspr(tcr);
+       val = mfspr(SPRN_TCR);
        val |= 0x04400000;
-       mtspr(tcr, val);
+       mtspr(SPRN_TCR, val);
 
        /*
         * Set EVPR to 0
@@ -136,7 +136,7 @@ int interrupt_init_cpu (unsigned *decrementer_count)
        set_evpr(0x00000000);
 
        /*
-        *Call uic or xilinx_irq pic_enable
+        * Call uic or xilinx_irq pic_enable
         */
        pic_enable();