ppc/85xx: add cpu init config file for boot from NAND

[u-boot] / cpu / ppc4xx / miiphy.c

diff --git a/cpu/ppc4xx/miiphy.c b/cpu/ppc4xx/miiphy.c
index d303598118db2dada66e4997f7d2bbb8c229e035..fa3bfc8d9f51f4e438613c9462424e18e39774d7 100644 (file)
--- a/cpu/ppc4xx/miiphy.c
+++ b/cpu/ppc4xx/miiphy.c
@@ -1,4 +1,6 @@
 /*-----------------------------------------------------------------------------+
+  |   This source code is dual-licensed.  You may use it under the terms of the
+  |   GNU General Public License version 2, or under the license below.
   |
   |      This source code has been made available to you by IBM on an AS-IS
   |      basis.  Anyone receiving this source is licensed under IBM
@@ -236,28 +238,24 @@ unsigned int miiphy_getemac_offset(u8 addr)
 #endif
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
-       u32 mode_reg;
        u32 eoffset = 0;
 
        switch (addr) {
 #if defined(CONFIG_HAS_ETH1) && defined(CONFIG_GPCS_PHY1_ADDR)
        case CONFIG_GPCS_PHY1_ADDR:
-               mode_reg = in_be32((void *)EMAC_M1 + 0x100);
-               if (addr == EMAC_M1_IPPA_GET(mode_reg))
+               if (addr == EMAC_M1_IPPA_GET(in_be32((void *)EMAC_M1 + 0x100)))
                        eoffset = 0x100;
                break;
 #endif
 #if defined(CONFIG_HAS_ETH2) && defined(CONFIG_GPCS_PHY2_ADDR)
        case CONFIG_GPCS_PHY2_ADDR:
-               mode_reg = in_be32((void *)EMAC_M1 + 0x300);
-               if (addr == EMAC_M1_IPPA_GET(mode_reg))
+               if (addr == EMAC_M1_IPPA_GET(in_be32((void *)EMAC_M1 + 0x300)))
                        eoffset = 0x300;
                break;
 #endif
 #if defined(CONFIG_HAS_ETH3) && defined(CONFIG_GPCS_PHY3_ADDR)
        case CONFIG_GPCS_PHY3_ADDR:
-               mode_reg = in_be32((void *)EMAC_M1 + 0x400);
-               if (addr == EMAC_M1_IPPA_GET(mode_reg))
+               if (addr == EMAC_M1_IPPA_GET(in_be32((void *)EMAC_M1 + 0x400)))
                        eoffset = 0x400;
                break;
 #endif
@@ -305,7 +303,7 @@ static int emac_miiphy_command(u8 addr, u8 reg, int cmd, u16 value)
 
        sta_reg = reg;          /* reg address */
 
-       /* set clock (50Mhz) and read flags */
+       /* set clock (50MHz) and read flags */
 #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \
     defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
     defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
@@ -352,7 +350,7 @@ int emac4xx_miiphy_read (char *devname, unsigned char addr, unsigned char reg,
                return -1;
 
        sta_reg = in_be32((void *)EMAC_STACR + emac_reg);
-       *value = *(u16 *)(&sta_reg);
+       *value = sta_reg >> 16;
 
        return 0;
 }