Fix Lite500B support: Merge with /home/raj/git/u-boot.l5200b_pci

[u-boot] / cpu / ppc4xx / serial.c

diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index 8cf7dab3a29e36fe82abe70c70ab62acce397372..83c947998ed51f81370f21558940dcc92e4a7003 100644 (file)
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -59,6 +59,8 @@
 #include <malloc.h>
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*****************************************************************************/
 #ifdef CONFIG_IOP480
 
@@ -161,8 +163,6 @@
 
 int serial_init (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        volatile char val;
        unsigned short br_reg;
 
@@ -185,8 +185,6 @@ int serial_init (void)
 
 void serial_setbrg (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        unsigned short br_reg;
 
        br_reg = ((((CONFIG_CPUCLOCK * 1000000) / 16) / gd->baudrate) - 1);
@@ -276,7 +274,12 @@ int serial_tstc ()
 #define UART0_BASE  CFG_PERIPHERAL_BASE + 0x00000200
 #define UART1_BASE  CFG_PERIPHERAL_BASE + 0x00000300
 #endif
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+
+#if defined(CONFIG_440SP)
+#define UART2_BASE  CFG_PERIPHERAL_BASE + 0x00000600
+#endif
+
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
 #define CR0_MASK        0xdfffffff
 #define CR0_EXTCLK_ENA  0x00800000
 #define CR0_UDIV_POS    0
@@ -306,21 +309,21 @@ int serial_tstc ()
 #if defined(CONFIG_UART1_CONSOLE)
 #define ACTING_UART0_BASE      UART1_BASE
 #define ACTING_UART1_BASE      UART0_BASE
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
 #define UART0_SDR           sdr_uart1
 #define UART1_SDR           sdr_uart0
 #endif /* CONFIG_440GX */
 #else
 #define ACTING_UART0_BASE      UART0_BASE
 #define ACTING_UART1_BASE      UART1_BASE
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
 #define UART0_SDR           sdr_uart0
 #define UART1_SDR           sdr_uart1
 #endif /* CONFIG_440GX */
 #endif
 
 #if defined(CONFIG_405EP) && defined(CFG_EXT_SERIAL_CLOCK)
-#error "External serial clock not supported on IBM PPC405EP!"
+#error "External serial clock not supported on AMCC PPC405EP!"
 #endif
 
 #define UART_RBR    0x00
@@ -426,8 +429,6 @@ int serial_init_dev (unsigned long dev_base)
 int serial_init(void)
 #endif
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        unsigned long reg;
        unsigned long udiv;
        unsigned short bdiv;
@@ -436,7 +437,7 @@ int serial_init(void)
        unsigned long tmp;
 #endif
 
-#if defined(CONFIG_440GX)
+#if defined(CONFIG_440GX) || defined(CONFIG_440SP)
 #if defined(CONFIG_SERIAL_MULTI)
        if (UART0_BASE == dev_base) {
                mfsdr(UART0_SDR,reg);
@@ -465,7 +466,7 @@ int serial_init(void)
        serial_divs (gd->baudrate, &udiv, &bdiv);
 #endif
 
-#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP)
        reg |= udiv << CR0_UDIV_POS;    /* set the UART divisor */
 #if defined(CONFIG_SERIAL_MULTI)
        if (UART0_BASE == dev_base) {
@@ -515,8 +516,6 @@ int serial_init_dev (unsigned long dev_base)
 int serial_init (void)
 #endif
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        unsigned long reg;
        unsigned long tmp;
        unsigned long clk;
@@ -592,8 +591,6 @@ void serial_setbrg_dev (unsigned long dev_base)
 void serial_setbrg (void)
 #endif
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        unsigned long tmp;
        unsigned long clk;
        unsigned long udiv;
@@ -875,8 +872,6 @@ int serial_buffered_tstc (void)
 #if (CONFIG_KGDB_SER_INDEX & 2)
 void kgdb_serial_init (void)
 {
-       DECLARE_GLOBAL_DATA_PTR;
-
        volatile char val;
        unsigned short br_reg;