mkimage: Make genimg_print_size() global

[u-boot] / cpu / sa1100 / cpu.c

diff --git a/cpu/sa1100/cpu.c b/cpu/sa1100/cpu.c
index d0dfa3d140b2ac0ca991c5fe845e1acbb264ac44..58e90dc9f69ec967e91675fd926d6f1ace7a1f10 100644 (file)
--- a/cpu/sa1100/cpu.c
+++ b/cpu/sa1100/cpu.c
@@ -38,17 +38,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
-int cpu_init (void)
-{
-       /*
-        * setup up stacks if necessary
-        */
-#ifdef CONFIG_USE_IRQ
-       IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_GBL_DATA_SIZE - 4;
-       FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
-#endif
-       return 0;
-}
+static void cache_flush(void);
 
 int cleanup_before_linux (void)
 {
@@ -59,76 +49,22 @@ int cleanup_before_linux (void)
         * just disable everything that can disturb booting linux
         */
 
-       unsigned long i;
-
        disable_interrupts ();
 
        /* turn off I-cache */
-       asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
-       i &= ~0x1000;
-       asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
+       icache_disable();
+       dcache_disable();
 
        /* flush I-cache */
-       asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
-
-       return (0);
-}
+       cache_flush();
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
-       printf ("resetting ...\n");
-
-       udelay (50000);                         /* wait 50 ms */
-       disable_interrupts ();
-       reset_cpu (0);
-
-       /*NOTREACHED*/
        return (0);
 }
 
-static void cp_delay (void)
-{
-       volatile int i;
-
-       /* copro seems to need some delay between reading and writing */
-       for (i = 0; i < 100; i++);
-}
-
-void icache_enable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();
-       cp_delay ();
-       set_cr (reg | CR_C);
-}
-
-void icache_disable (void)
-{
-       ulong reg;
-
-       reg = get_cr ();
-       cp_delay ();
-       set_cr (reg & ~CR_C);
-}
-
-int icache_status (void)
+/* flush I/D-cache */
+static void cache_flush (void)
 {
-       return (get_cr () & CR_C) != 0;
-}
+       unsigned long i = 0;
 
-/* we will never enable dcache, because we have to setup MMU first */
-void dcache_enable (void)
-{
-       return;
-}
-
-void dcache_disable (void)
-{
-       return;
-}
-
-int dcache_status (void)
-{
-       return 0;                                       /* always off */
+       asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
 }