]> git.sur5r.net Git - u-boot/blobdiff - cpu/sh4/cache.c
nand: fixup printf modifiers to match types used
[u-boot] / cpu / sh4 / cache.c
index 55acb31bc4bb07eef519821f2c3e007a895305b4..377005cd4d32aa4bea01016d7480bcc369acae60 100644 (file)
  * Jump to P2 area.
  * When handling TLB or caches, we need to do it from P2 area.
  */
-#define jump_to_P2()                    \
-  do {                                    \
+#define jump_to_P2()                   \
+  do {                                 \
     unsigned long __dummy;             \
-    __asm__ __volatile__(                      \
-                "mov.l  1f, %0\n\t"     \
-                "or     %1, %0\n\t"     \
-                "jmp    @%0\n\t"        \
-                " nop\n\t"              \
-                ".balign 4\n"           \
-                "1:     .long 2f\n"     \
-                "2:"                    \
-                : "=&r" (__dummy)       \
-                : "r" (0x20000000));    \
+    __asm__ __volatile__(              \
+               "mov.l  1f, %0\n\t"     \
+               "or     %1, %0\n\t"     \
+               "jmp    @%0\n\t"        \
+               " nop\n\t"              \
+               ".balign 4\n"           \
+               "1:     .long 2f\n"     \
+               "2:"                    \
+               : "=&r" (__dummy)       \
+               : "r" (0x20000000));    \
   } while (0)
 
 /*
  * Back to P1 area.
  */
-#define back_to_P1()                                    \
-  do {                                                    \
-    unsigned long __dummy;                          \
-    __asm__ __volatile__(                           \
-                "nop;nop;nop;nop;nop;nop;nop\n\t"       \
-                "mov.l  1f, %0\n\t"                     \
-                "jmp    @%0\n\t"                        \
-                " nop\n\t"                              \
-                ".balign 4\n"                           \
-                "1:     .long 2f\n"                     \
-                "2:"                                    \
-                : "=&r" (__dummy));                     \
+#define back_to_P1()                                   \
+  do {                                                 \
+    unsigned long __dummy;                             \
+    __asm__ __volatile__(                              \
+               "nop;nop;nop;nop;nop;nop;nop\n\t"       \
+               "mov.l  1f, %0\n\t"                     \
+               "jmp    @%0\n\t"                        \
+               " nop\n\t"                              \
+               ".balign 4\n"                           \
+               "1:     .long 2f\n"                     \
+               "2:"                                    \
+               : "=&r" (__dummy));                     \
   } while (0)
 
 #define CACHE_VALID       1
@@ -72,9 +72,9 @@ static inline void cache_wback_all(void)
        jump_to_P2();
        for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++){
                for (j = 0; j < CACHE_OC_NUM_WAYS; j++) {
-                       addr = CACHE_OC_ADDRESS_ARRAY | (j << CACHE_OC_WAY_SHIFT)
+                       addr = CACHE_OC_ADDRESS_ARRAY | (j << CACHE_OC_WAY_SHIFT)
                                | (i << CACHE_OC_ENTRY_SHIFT);
-                       data = inl(addr);
+                       data = inl(addr);
                        if (data & CACHE_UPDATED) {
                                data &= ~CACHE_UPDATED;
                                outl(data, addr);