new: USE_MSR_INTR support

[u-boot] / doc / I2C_Edge_Conditions

diff --git a/doc/I2C_Edge_Conditions b/doc/I2C_Edge_Conditions
index be7f1bee1f1b8a73ffad5fe08684b202995e7909..44d34785499773dca1d5a38a1297110ea71479e7 100644 (file)
--- a/doc/I2C_Edge_Conditions
+++ b/doc/I2C_Edge_Conditions
@@ -28,7 +28,7 @@ I2C Edge Conditions:
 
 Notes
 -----
-!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A IBM 4xx BUG!!!
+!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!!
 
 This reset edge condition could possibly be present in every I2C
 controller and device available. For boards where a I2C bus reset