pdm360ng: add EDID property to FDT display node

[u-boot] / doc / README.POST

diff --git a/doc/README.POST b/doc/README.POST
index fba498a3a5548cc1debd1a7356105450e0c07ea5..eeb218d39c64c064cd69143a848676074f3b9404 100644 (file)
--- a/doc/README.POST
+++ b/doc/README.POST
@@ -5,7 +5,7 @@ This project is to support Power-On-Self-Test (POST) in U-Boot.
 
 1. High-level requirements
 
-The key rquirements for this project are as follows:
+The key requirements for this project are as follows:
 
 1) The project shall develop a flexible framework for implementing
    and running Power-On-Self-Test in U-Boot. This framework shall
@@ -72,7 +72,7 @@ tests. All POST tests will be divided into the following groups:
      This group will contain those tests that do not take much
      time and can be run on the regular basis (e.g. CPU test)
 
-  3) Tests running on in special "slow test more" only
+  3) Tests running in special "slow test mode" only
 
      This group will contain POST tests that consume much time
      and cannot be run regularly (e.g. strong memory test, I2C test)
@@ -92,7 +92,7 @@ Specifically, the following groups will be singled out:
 
   1) Tests running before relocating to RAM
 
-     These tests will run immediatelly after initializing RAM
+     These tests will run immediately after initializing RAM
      as to enable modifying it without taking care of its
      contents. Basically, this group will contain memory tests
      only.
@@ -713,7 +713,7 @@ use external loopback for testing. That will need appropriate
 reconfiguration of the physical interface chip.
 
 The test routines for the SCC ethernet tests will be located in
-cpu/mpc8xx/scc.c.
+arch/powerpc/cpu/mpc8xx/scc.c.
 
 2.2.3.2. UART tests (SMC/SCC)
 
@@ -725,7 +725,7 @@ will be transmitted. These tests may be enhanced to make to perform
 test will be executed manually.
 
 The test routine for the SMC/SCC UART tests will be located in
-cpu/mpc8xx/serial.c.
+arch/powerpc/cpu/mpc8xx/serial.c.
 
 2.2.3.3. USB test