#include <malloc.h>
#include <libata.h>
#include <fis.h>
+#include <sata.h>
#include "fsl_sata.h"
-extern block_dev_desc_t sata_dev_desc[CONFIG_SYS_SATA_MAX_DEVICE];
-
#ifndef CONFIG_SYS_SATA1_FLAGS
#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
#endif
#endif
};
-static inline void mdelay(unsigned long msec)
-{
- unsigned long i;
- for (i = 0; i < msec; i++)
- udelay(1000);
-}
-
static inline void sdelay(unsigned long sec)
{
unsigned long i;
/* Wait the controller offline */
ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
-#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
- /*
- * For P1022/1013 Rev1.0 silicon, after power on SATA host
- * controller is configured in legacy mode instead of the
- * expected enterprise mode. software needs to clear bit[28]
- * of HControl register to change to enterprise mode from
- * legacy mode.
- */
- {
- u32 svr = get_svr();
- if (IS_SVR_REV(svr, 1, 0) &&
- ((SVR_SOC_VER(svr) == SVR_P1022) ||
- (SVR_SOC_VER(svr) == SVR_P1022_E) ||
- (SVR_SOC_VER(svr) == SVR_P1013) ||
- (SVR_SOC_VER(svr) == SVR_P1013_E))) {
- out_le32(®->hstatus, 0x20000000);
- out_le32(®->hcontrol, 0x00000100);
- }
- }
-#endif
-
/* Set the command header base address to CHBA register to tell DMA */
out_le32(®->chba, (u32)cmd_hdr & ~0x3);
return sata->flush_ext;
}
-u32 ata_low_level_rw_lba48(int dev, u32 blknr, u32 blkcnt, void *buffer, int is_write)
+u32 ata_low_level_rw_lba48(int dev, u32 blknr, lbaint_t blkcnt,
+ const void *buffer, int is_write)
{
u32 start, blks;
u8 *addr;
return blkcnt;
}
-u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt, void *buffer, int is_write)
+u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt, const void *buffer,
+ int is_write)
{
u32 start, blks;
u8 *addr;
/*
* SATA interface between low level driver and command layer
*/
-ulong sata_read(int dev, u32 blknr, u32 blkcnt, void *buffer)
+ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
{
u32 rc;
fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
return rc;
}
-ulong sata_write(int dev, u32 blknr, u32 blkcnt, void *buffer)
+ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
{
u32 rc;
fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;