]> git.sur5r.net Git - u-boot/blobdiff - drivers/block/systemace.c
Merge git://git.denx.de/u-boot-spi
[u-boot] / drivers / block / systemace.c
index 7d82c27c6edd7d35c9b15fc3ec6f62dce4f035bb..9392beaf052eb419ffb9f106018fd0746032c80d 100644 (file)
@@ -2,25 +2,12 @@
  * Copyright (c) 2004 Picture Elements, Inc.
  *    Stephen Williams (XXXXXXXXXXXXXXXX)
  *
- *    This source code is free software; you can redistribute it
- *    and/or modify it in source code form under the terms of the GNU
- *    General Public License as published by the Free Software
- *    Foundation; either version 2 of the License, or (at your option)
- *    any later version.
- *
- *    This program is distributed in the hope that it will be useful,
- *    but WITHOUT ANY WARRANTY; without even the implied warranty of
- *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *    GNU General Public License for more details.
- *
- *    You should have received a copy of the GNU General Public License
- *    along with this program; if not, write to the Free Software
- *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
  * The Xilinx SystemACE chip support is activated by defining
- * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
+ * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE
  * to set the base address of the device. This code currently
  * assumes that the chip is connected via a byte-wide bus.
  *
 
 #include <common.h>
 #include <command.h>
-#include <systemace.h>
+#include <dm.h>
 #include <part.h>
 #include <asm/io.h>
 
-#ifdef CONFIG_SYSTEMACE
-
 /*
  * The ace_readw and writew functions read/write 16bit words, but the
  * offset value is the BYTE offset as most used in the Xilinx
- * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
+ * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined
  * to be the base address for the chip, usually in the local
  * peripheral bus.
  */
-#if (CFG_SYSTEMACE_WIDTH == 8)
+
+static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
+static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
+
+static void ace_writew(u16 val, unsigned off)
+{
+       if (width == 8) {
 #if !defined(__BIG_ENDIAN)
-#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)<<8) | \
-                       (readb(CFG_SYSTEMACE_BASE+off+1)))
-#define ace_writew(val, off) {writeb(val>>8, CFG_SYSTEMACE_BASE+off); \
-                             writeb(val, CFG_SYSTEMACE_BASE+off+1);}
+               writeb(val >> 8, base + off);
+               writeb(val, base + off + 1);
 #else
-#define ace_readw(off) ((readb(CFG_SYSTEMACE_BASE+off)) | \
-                       (readb(CFG_SYSTEMACE_BASE+off+1)<<8))
-#define ace_writew(val, off) {writeb(val, CFG_SYSTEMACE_BASE+off); \
-                             writeb(val>>8, CFG_SYSTEMACE_BASE+off+1);}
+               writeb(val, base + off);
+               writeb(val >> 8, base + off + 1);
 #endif
+       } else
+               out16(base + off, val);
+}
+
+static u16 ace_readw(unsigned off)
+{
+       if (width == 8) {
+#if !defined(__BIG_ENDIAN)
+               return (readb(base + off) << 8) | readb(base + off + 1);
 #else
-#define ace_readw(off) (in16(CFG_SYSTEMACE_BASE+off))
-#define ace_writew(val, off) (out16(CFG_SYSTEMACE_BASE+off,val))
+               return readb(base + off) | (readb(base + off + 1) << 8);
 #endif
+       }
 
-/* */
-
-static unsigned long systemace_read(int dev, unsigned long start,
-                                   unsigned long blkcnt, void *buffer);
+       return in16(base + off);
+}
 
-static block_dev_desc_t systemace_dev = { 0 };
+#ifndef CONFIG_BLK
+static struct blk_desc systemace_dev = { 0 };
+#endif
 
 static int get_cf_lock(void)
 {
@@ -106,38 +102,19 @@ static void release_cf_lock(void)
        ace_writew((val & 0xffff), 0x18);
 }
 
-block_dev_desc_t *systemace_get_dev(int dev)
-{
-       /* The first time through this, the systemace_dev object is
-          not yet initialized. In that case, fill it in. */
-       if (systemace_dev.blksz == 0) {
-               systemace_dev.if_type = IF_TYPE_UNKNOWN;
-               systemace_dev.dev = 0;
-               systemace_dev.part_type = PART_TYPE_UNKNOWN;
-               systemace_dev.type = DEV_TYPE_HARDDISK;
-               systemace_dev.blksz = 512;
-               systemace_dev.removable = 1;
-               systemace_dev.block_read = systemace_read;
-
-               /*
-                * Ensure the correct bus mode (8/16 bits) gets enabled
-                */
-               ace_writew(CFG_SYSTEMACE_WIDTH == 8 ? 0 : 0x0001, 0);
-
-               init_part(&systemace_dev);
-
-       }
-
-       return &systemace_dev;
-}
-
 /*
  * This function is called (by dereferencing the block_read pointer in
  * the dev_desc) to read blocks of data. The return value is the
  * number of blocks read. A zero return indicates an error.
  */
-static unsigned long systemace_read(int dev, unsigned long start,
-                                   unsigned long blkcnt, void *buffer)
+#ifdef CONFIG_BLK
+static unsigned long systemace_read(struct udevice *dev, unsigned long start,
+                                   lbaint_t blkcnt, void *buffer)
+#else
+static unsigned long systemace_read(struct blk_desc *block_dev,
+                                   unsigned long start, lbaint_t blkcnt,
+                                   void *buffer)
+#endif
 {
        int retry;
        unsigned blk_countdown;
@@ -255,4 +232,72 @@ static unsigned long systemace_read(int dev, unsigned long start,
 
        return blkcnt;
 }
-#endif /* CONFIG_SYSTEMACE */
+
+#ifdef CONFIG_BLK
+static int systemace_bind(struct udevice *dev)
+{
+       struct blk_desc *bdesc;
+       struct udevice *bdev;
+       int ret;
+
+       ret = blk_create_devicef(dev, "systemace_blk", "blk", IF_TYPE_SYSTEMACE,
+                                -1, 512, 0, &bdev);
+       if (ret) {
+               debug("Cannot create block device\n");
+               return ret;
+       }
+       bdesc = dev_get_uclass_platdata(bdev);
+       bdesc->removable = 1;
+       bdesc->part_type = PART_TYPE_UNKNOWN;
+       bdesc->log2blksz = LOG2(bdesc->blksz);
+
+       /* Ensure the correct bus mode (8/16 bits) gets enabled */
+       ace_writew(width == 8 ? 0 : 0x0001, 0);
+
+       return 0;
+}
+
+static const struct blk_ops systemace_blk_ops = {
+       .read   = systemace_read,
+};
+
+U_BOOT_DRIVER(systemace_blk) = {
+       .name           = "systemace_blk",
+       .id             = UCLASS_BLK,
+       .ops            = &systemace_blk_ops,
+       .bind           = systemace_bind,
+};
+#else
+static int systemace_get_dev(int dev, struct blk_desc **descp)
+{
+       /* The first time through this, the systemace_dev object is
+          not yet initialized. In that case, fill it in. */
+       if (systemace_dev.blksz == 0) {
+               systemace_dev.if_type = IF_TYPE_UNKNOWN;
+               systemace_dev.devnum = 0;
+               systemace_dev.part_type = PART_TYPE_UNKNOWN;
+               systemace_dev.type = DEV_TYPE_HARDDISK;
+               systemace_dev.blksz = 512;
+               systemace_dev.log2blksz = LOG2(systemace_dev.blksz);
+               systemace_dev.removable = 1;
+               systemace_dev.block_read = systemace_read;
+
+               /*
+                * Ensure the correct bus mode (8/16 bits) gets enabled
+                */
+               ace_writew(width == 8 ? 0 : 0x0001, 0);
+
+               part_init(&systemace_dev);
+       }
+       *descp = &systemace_dev;
+
+       return 0;
+}
+
+U_BOOT_LEGACY_BLK(systemace) = {
+       .if_typename    = "ace",
+       .if_type        = IF_TYPE_SYSTEMACE,
+       .max_devs       = 1,
+       .get_dev        = systemace_get_dev,
+};
+#endif