spi: xilinx: Read reg base address from DTS file

[u-boot] / drivers / clk / Kconfig

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 5ca958c0075db9ca235786c0d06ca3173cfd8bf3..18bf8a6d28b168a6978070f2736c14365ce51c4a 100644 (file)
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -12,7 +12,7 @@ config CLK
 
 config SPL_CLK
        bool "Enable clock support in SPL"
-       depends on CLK
+       depends on CLK && SPL && SPL_DM
        help
          The clock subsystem adds a small amount of overhead to the image.
          If this is acceptable and you have a need to use clock drivers in
@@ -20,6 +20,24 @@ config SPL_CLK
          setting up clocks within SPL, and allows the same drivers to be
          used as U-Boot proper.
 
+config TPL_CLK
+       bool "Enable clock support in TPL"
+       depends on CLK && TPL_DM
+       help
+         The clock subsystem adds a small amount of overhead to the image.
+         If this is acceptable and you have a need to use clock drivers in
+         SPL, enable this option. It might provide a cleaner interface to
+         setting up clocks within TPL, and allows the same drivers to be
+         used as U-Boot proper.
+
+config CLK_BCM6345
+       bool "Clock controller driver for BCM6345"
+       depends on CLK && ARCH_BMIPS
+       default y
+       help
+         This clock driver adds support for enabling and disabling peripheral
+         clocks on BCM6345 SoCs. HW has no rate changing capabilities.
+
 config CLK_BOSTON
        def_bool y if TARGET_BOSTON
        depends on CLK
@@ -28,6 +46,20 @@ config CLK_BOSTON
        help
          Enable this to support the clocks
 
+config CLK_STM32F
+       bool "Enable clock driver support for STM32F family"
+       depends on CLK && (STM32F7 || STM32F4)
+       default y
+       help
+         This clock driver adds support for RCC clock management
+         for STM32F4 and STM32F7 SoCs.
+
+config CLK_HSDK
+       bool "Enable cgu clock driver for HSDK"
+       depends on CLK
+       help
+         Enable this to support the cgu clocks on Synopsys ARC HSDK
+
 config CLK_ZYNQ
        bool "Enable clock driver support for Zynq"
        depends on CLK && ARCH_ZYNQ
@@ -43,9 +75,28 @@ config CLK_ZYNQMP
          This clock driver adds support for clock realted settings for
          ZynqMP platform.
 
+config CLK_STM32MP1
+       bool "Enable RCC clock driver for STM32MP1"
+       depends on ARCH_STM32MP && CLK
+       default y
+       help
+         Enable the STM32 clock (RCC) driver. Enable support for
+         manipulating STM32MP1's on-SoC clocks.
+
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/at91/Kconfig"
+source "drivers/clk/renesas/Kconfig"
+source "drivers/clk/mvebu/Kconfig"
+source "drivers/clk/owl/Kconfig"
+
+config ICS8N3QV01
+       bool "Enable ICS8N3QV01 VCXO driver"
+       depends on CLK
+       help
+         Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
+         Crystal Oscillator). The output frequency can be programmed via an
+         I2C interface.
 
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