spi: xilinx: Read reg base address from DTS file

[u-boot] / drivers / clk / Kconfig

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index f6644ee6d16f881be63a6f9661f15a25152942e0..18bf8a6d28b168a6978070f2736c14365ce51c4a 100644 (file)
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -54,6 +54,12 @@ config CLK_STM32F
          This clock driver adds support for RCC clock management
          for STM32F4 and STM32F7 SoCs.
 
+config CLK_HSDK
+       bool "Enable cgu clock driver for HSDK"
+       depends on CLK
+       help
+         Enable this to support the cgu clocks on Synopsys ARC HSDK
+
 config CLK_ZYNQ
        bool "Enable clock driver support for Zynq"
        depends on CLK && ARCH_ZYNQ
@@ -69,10 +75,28 @@ config CLK_ZYNQMP
          This clock driver adds support for clock realted settings for
          ZynqMP platform.
 
+config CLK_STM32MP1
+       bool "Enable RCC clock driver for STM32MP1"
+       depends on ARCH_STM32MP && CLK
+       default y
+       help
+         Enable the STM32 clock (RCC) driver. Enable support for
+         manipulating STM32MP1's on-SoC clocks.
+
 source "drivers/clk/tegra/Kconfig"
 source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/at91/Kconfig"
 source "drivers/clk/renesas/Kconfig"
+source "drivers/clk/mvebu/Kconfig"
+source "drivers/clk/owl/Kconfig"
+
+config ICS8N3QV01
+       bool "Enable ICS8N3QV01 VCXO driver"
+       depends on CLK
+       help
+         Support for the ICS8N3QV01 Quad-Frequency VCXO (Voltage-Controlled
+         Crystal Oscillator). The output frequency can be programmed via an
+         I2C interface.
 
 endmenu