return -ENODEV;
}
+void *rockchip_get_cru(void)
+{
+ struct rk3288_clk_priv *priv;
+ struct udevice *dev;
+ int ret;
+
+ ret = rkclk_get_clk(CLK_GENERAL, &dev);
+ if (ret)
+ return ERR_PTR(ret);
+ priv = dev_get_priv(dev);
+ return priv->cru;
+}
+
static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{
gclk_rate = clk_get_rate(gclk);
switch (periph) {
case HCLK_EMMC:
+ case HCLK_SDMMC:
case HCLK_SDIO0:
- case HCLK_SDIO1:
new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, periph);
break;
case SCLK_SPI0: