drivers/ddr/fsl: Dual-license DDR driver

[u-boot] / drivers / ddr / fsl / interactive.c

diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c
index 6aa16b23ddc95f6df53077fd2c789141dee4eb19..f5c21e44685e7b99c5a03dec0888c4f27d815788 100644 (file)
--- a/drivers/ddr/fsl/interactive.c
+++ b/drivers/ddr/fsl/interactive.c
@@ -1,7 +1,8 @@
 /*
- * Copyright 2010-2014 Freescale Semiconductor, Inc.
+ * Copyright 2010-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017-2018 NXP Semiconductor
  *
- * SPDX-License-Identifier:    GPL-2.0+
+ * SPDX-License-Identifier:    GPL-2.0+        BSD-3-Clause
  */
 
 /*
@@ -154,7 +155,9 @@ static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
        static const struct options_string options[] = {
                COMMON_TIMING(tckmin_x_ps),
                COMMON_TIMING(tckmax_ps),
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
                COMMON_TIMING(taamin_ps),
+#endif
                COMMON_TIMING(trcd_ps),
                COMMON_TIMING(trp_ps),
                COMMON_TIMING(tras_ps),
@@ -166,6 +169,7 @@ static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                COMMON_TIMING(trrds_ps),
                COMMON_TIMING(trrdl_ps),
                COMMON_TIMING(tccdl_ps),
+               COMMON_TIMING(trfc_slr_ps),
 #else
                COMMON_TIMING(twtr_ps),
                COMMON_TIMING(trfc_ps),
@@ -205,6 +209,8 @@ static void lowest_common_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 
 #define DIMM_PARM(x) {#x, offsetof(dimm_params_t, x), \
        sizeof((dimm_params_t *)0)->x, 0}
+#define DIMM_PARM_HEX(x) {#x, offsetof(dimm_params_t, x), \
+       sizeof((dimm_params_t *)0)->x, 1}
 
 static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                                   unsigned int ctrl_num,
@@ -219,7 +225,9 @@ static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                DIMM_PARM(data_width),
                DIMM_PARM(primary_sdram_width),
                DIMM_PARM(ec_sdram_width),
+               DIMM_PARM(package_3ds),
                DIMM_PARM(registered_dimm),
+               DIMM_PARM(mirrored_dimm),
                DIMM_PARM(device_width),
 
                DIMM_PARM(n_row_addr),
@@ -228,11 +236,11 @@ static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
 #ifdef CONFIG_SYS_FSL_DDR4
                DIMM_PARM(bank_addr_bits),
                DIMM_PARM(bank_group_bits),
+               DIMM_PARM_HEX(die_density),
 #else
                DIMM_PARM(n_banks_per_sdram_device),
 #endif
                DIMM_PARM(burst_lengths_bitmask),
-               DIMM_PARM(row_density),
 
                DIMM_PARM(tckmin_x_ps),
                DIMM_PARM(tckmin_x_minus_1_ps),
@@ -255,6 +263,7 @@ static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                DIMM_PARM(trrds_ps),
                DIMM_PARM(trrdl_ps),
                DIMM_PARM(tccdl_ps),
+               DIMM_PARM(trfc_slr_ps),
 #else
                DIMM_PARM(twr_ps),
                DIMM_PARM(twtr_ps),
@@ -274,7 +283,27 @@ static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                DIMM_PARM(tdqsq_max_ps),
                DIMM_PARM(tqhs_ps),
 #endif
-
+#ifdef CONFIG_SYS_FSL_DDR4
+               DIMM_PARM_HEX(dq_mapping[0]),
+               DIMM_PARM_HEX(dq_mapping[1]),
+               DIMM_PARM_HEX(dq_mapping[2]),
+               DIMM_PARM_HEX(dq_mapping[3]),
+               DIMM_PARM_HEX(dq_mapping[4]),
+               DIMM_PARM_HEX(dq_mapping[5]),
+               DIMM_PARM_HEX(dq_mapping[6]),
+               DIMM_PARM_HEX(dq_mapping[7]),
+               DIMM_PARM_HEX(dq_mapping[8]),
+               DIMM_PARM_HEX(dq_mapping[9]),
+               DIMM_PARM_HEX(dq_mapping[10]),
+               DIMM_PARM_HEX(dq_mapping[11]),
+               DIMM_PARM_HEX(dq_mapping[12]),
+               DIMM_PARM_HEX(dq_mapping[13]),
+               DIMM_PARM_HEX(dq_mapping[14]),
+               DIMM_PARM_HEX(dq_mapping[15]),
+               DIMM_PARM_HEX(dq_mapping[16]),
+               DIMM_PARM_HEX(dq_mapping[17]),
+               DIMM_PARM(dq_mapping_ors),
+#endif
                DIMM_PARM(rank_density),
                DIMM_PARM(capacity),
                DIMM_PARM(base_address),
@@ -295,7 +324,9 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(data_width),
                DIMM_PARM(primary_sdram_width),
                DIMM_PARM(ec_sdram_width),
+               DIMM_PARM(package_3ds),
                DIMM_PARM(registered_dimm),
+               DIMM_PARM(mirrored_dimm),
                DIMM_PARM(device_width),
 
                DIMM_PARM(n_row_addr),
@@ -304,6 +335,7 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
 #ifdef CONFIG_SYS_FSL_DDR4
                DIMM_PARM(bank_addr_bits),
                DIMM_PARM(bank_group_bits),
+               DIMM_PARM_HEX(die_density),
 #else
                DIMM_PARM(n_banks_per_sdram_device),
 #endif
@@ -314,6 +346,7 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(tckmax_ps),
 
                DIMM_PARM(caslat_x),
+               DIMM_PARM_HEX(caslat_x),
                DIMM_PARM(taa_ps),
                DIMM_PARM(caslat_x_minus_1),
                DIMM_PARM(caslat_x_minus_2),
@@ -322,6 +355,9 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(trcd_ps),
                DIMM_PARM(trp_ps),
                DIMM_PARM(tras_ps),
+#if defined(CONFIG_SYS_FSL_DDR4) || defined(CONFIG_SYS_FSL_DDR3)
+               DIMM_PARM(tfaw_ps),
+#endif
 #ifdef CONFIG_SYS_FSL_DDR4
                DIMM_PARM(trfc1_ps),
                DIMM_PARM(trfc2_ps),
@@ -329,6 +365,7 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(trrds_ps),
                DIMM_PARM(trrdl_ps),
                DIMM_PARM(tccdl_ps),
+               DIMM_PARM(trfc_slr_ps),
 #else
                DIMM_PARM(twr_ps),
                DIMM_PARM(twtr_ps),
@@ -346,6 +383,27 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(tdh_ps),
                DIMM_PARM(tdqsq_max_ps),
                DIMM_PARM(tqhs_ps),
+#endif
+#ifdef CONFIG_SYS_FSL_DDR4
+               DIMM_PARM_HEX(dq_mapping[0]),
+               DIMM_PARM_HEX(dq_mapping[1]),
+               DIMM_PARM_HEX(dq_mapping[2]),
+               DIMM_PARM_HEX(dq_mapping[3]),
+               DIMM_PARM_HEX(dq_mapping[4]),
+               DIMM_PARM_HEX(dq_mapping[5]),
+               DIMM_PARM_HEX(dq_mapping[6]),
+               DIMM_PARM_HEX(dq_mapping[7]),
+               DIMM_PARM_HEX(dq_mapping[8]),
+               DIMM_PARM_HEX(dq_mapping[9]),
+               DIMM_PARM_HEX(dq_mapping[10]),
+               DIMM_PARM_HEX(dq_mapping[11]),
+               DIMM_PARM_HEX(dq_mapping[12]),
+               DIMM_PARM_HEX(dq_mapping[13]),
+               DIMM_PARM_HEX(dq_mapping[14]),
+               DIMM_PARM_HEX(dq_mapping[15]),
+               DIMM_PARM_HEX(dq_mapping[16]),
+               DIMM_PARM_HEX(dq_mapping[17]),
+               DIMM_PARM(dq_mapping_ors),
 #endif
        };
        static const unsigned int n_opts = ARRAY_SIZE(options);
@@ -373,7 +431,9 @@ static void print_lowest_common_dimm_parameters(
                const common_timing_params_t *plcd_dimm_params)
 {
        static const struct options_string options[] = {
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
                COMMON_TIMING(taamin_ps),
+#endif
                COMMON_TIMING(trcd_ps),
                COMMON_TIMING(trp_ps),
                COMMON_TIMING(tras_ps),
@@ -384,6 +444,7 @@ static void print_lowest_common_dimm_parameters(
                COMMON_TIMING(trrds_ps),
                COMMON_TIMING(trrdl_ps),
                COMMON_TIMING(tccdl_ps),
+               COMMON_TIMING(trfc_slr_ps),
 #else
                COMMON_TIMING(twtr_ps),
                COMMON_TIMING(trfc_ps),
@@ -463,7 +524,7 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
                CTRL_OPTIONS_CS(3, odt_rd_cfg),
                CTRL_OPTIONS_CS(3, odt_wr_cfg),
 #endif
-#if defined(CONFIG_SYS_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
                CTRL_OPTIONS_CS(0, odt_rtt_norm),
                CTRL_OPTIONS_CS(0, odt_rtt_wr),
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
@@ -505,8 +566,10 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
                 */
                CTRL_OPTIONS(twot_en),
                CTRL_OPTIONS(threet_en),
+               CTRL_OPTIONS(mirrored_dimm),
                CTRL_OPTIONS(ap_en),
                CTRL_OPTIONS(x4_en),
+               CTRL_OPTIONS(package_3ds),
                CTRL_OPTIONS(bstopre),
                CTRL_OPTIONS(wrlvl_override),
                CTRL_OPTIONS(wrlvl_sample),
@@ -515,9 +578,9 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
                CTRL_OPTIONS(rcw_override),
                CTRL_OPTIONS(rcw_1),
                CTRL_OPTIONS(rcw_2),
+               CTRL_OPTIONS(rcw_3),
                CTRL_OPTIONS(ddr_cdr1),
                CTRL_OPTIONS(ddr_cdr2),
-               CTRL_OPTIONS(tcke_clock_pulse_width_ps),
                CTRL_OPTIONS(tfaw_window_four_activates_ps),
                CTRL_OPTIONS(trwt_override),
                CTRL_OPTIONS(trwt),
@@ -608,6 +671,7 @@ static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)
                CFG_REGS(ddr_sr_cntr),
                CFG_REGS(ddr_sdram_rcw_1),
                CFG_REGS(ddr_sdram_rcw_2),
+               CFG_REGS(ddr_sdram_rcw_3),
                CFG_REGS(ddr_cdr1),
                CFG_REGS(ddr_cdr2),
                CFG_REGS(dq_map_0),
@@ -622,7 +686,7 @@ static void print_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr)
 
        print_option_table(options, n_opts, ddr);
 
-       for (i = 0; i < 32; i++)
+       for (i = 0; i < 64; i++)
                printf("debug_%02d = 0x%08X\n", i+1, ddr->debug[i]);
 }
 
@@ -698,6 +762,7 @@ static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,
                CFG_REGS(ddr_sr_cntr),
                CFG_REGS(ddr_sdram_rcw_1),
                CFG_REGS(ddr_sdram_rcw_2),
+               CFG_REGS(ddr_sdram_rcw_3),
                CFG_REGS(ddr_cdr1),
                CFG_REGS(ddr_cdr2),
                CFG_REGS(dq_map_0),
@@ -715,7 +780,7 @@ static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,
        debug("fsl_ddr_regs_edit: ctrl_num = %u, "
                "regname = %s, value = %s\n",
                ctrl_num, regname, value_str);
-       if (ctrl_num > CONFIG_NUM_DDR_CONTROLLERS)
+       if (ctrl_num > CONFIG_SYS_NUM_DDR_CTLRS)
                return;
 
        ddr = &(pinfo->fsl_ddr_config_reg[ctrl_num]);
@@ -723,7 +788,7 @@ static void fsl_ddr_regs_edit(fsl_ddr_info_t *pinfo,
        if (handle_option_table(options, n_opts, ddr, regname, value_str))
                return;
 
-       for (i = 0; i < 32; i++) {
+       for (i = 0; i < 64; i++) {
                unsigned int value = simple_strtoul(value_str, NULL, 0);
                sprintf(buf, "debug_%u", i + 1);
                if (strcmp(buf, regname) == 0) {
@@ -754,7 +819,7 @@ static void print_memctl_options(const memctl_options_t *popts)
                CTRL_OPTIONS_CS(3, odt_rd_cfg),
                CTRL_OPTIONS_CS(3, odt_wr_cfg),
 #endif
-#if defined(CONFIG_SYS_FSL_DDR3)
+#if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
                CTRL_OPTIONS_CS(0, odt_rtt_norm),
                CTRL_OPTIONS_CS(0, odt_rtt_wr),
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 1)
@@ -796,19 +861,21 @@ static void print_memctl_options(const memctl_options_t *popts)
                CTRL_OPTIONS(twot_en),
                CTRL_OPTIONS(threet_en),
                CTRL_OPTIONS(registered_dimm_en),
+               CTRL_OPTIONS(mirrored_dimm),
                CTRL_OPTIONS(ap_en),
                CTRL_OPTIONS(x4_en),
+               CTRL_OPTIONS(package_3ds),
                CTRL_OPTIONS(bstopre),
                CTRL_OPTIONS(wrlvl_override),
                CTRL_OPTIONS(wrlvl_sample),
                CTRL_OPTIONS(wrlvl_start),
                CTRL_OPTIONS_HEX(cswl_override),
                CTRL_OPTIONS(rcw_override),
-               CTRL_OPTIONS(rcw_1),
-               CTRL_OPTIONS(rcw_2),
+               CTRL_OPTIONS_HEX(rcw_1),
+               CTRL_OPTIONS_HEX(rcw_2),
+               CTRL_OPTIONS_HEX(rcw_3),
                CTRL_OPTIONS_HEX(ddr_cdr1),
                CTRL_OPTIONS_HEX(ddr_cdr2),
-               CTRL_OPTIONS(tcke_clock_pulse_width_ps),
                CTRL_OPTIONS(tfaw_window_four_activates_ps),
                CTRL_OPTIONS(trwt_override),
                CTRL_OPTIONS(trwt),
@@ -1637,7 +1704,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 1:  DIMM SPD data */
        if (do_mask & STEP_GET_SPD) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
 
@@ -1658,7 +1725,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 2:  DIMM Parameters */
        if (do_mask & STEP_COMPUTE_DIMM_PARMS) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
                        for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
@@ -1677,7 +1744,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 3:  Common Parameters */
        if (do_mask & STEP_COMPUTE_COMMON_PARMS) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
                        printf("\"lowest common\" DIMM parameters:  "
@@ -1691,7 +1758,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 4:  User Configuration Options */
        if (do_mask & STEP_GATHER_OPTS) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
                        printf("User Config Options: Controller=%u\n", i);
@@ -1703,7 +1770,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 5:  Address assignment */
        if (do_mask & STEP_ASSIGN_ADDRESSES) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
                        for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) {
@@ -1718,7 +1785,7 @@ static void fsl_ddr_printinfo(const fsl_ddr_info_t *pinfo,
 
        /* STEP 6:  computed controller register values */
        if (do_mask & STEP_COMPUTE_REGS) {
-               for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) {
+               for (i = 0; i < CONFIG_SYS_NUM_DDR_CTLRS; i++) {
                        if (!(ctrl_mask & (1 << i)))
                                continue;
                        printf("Computed Register Values: Controller=%u\n", i);
@@ -1809,7 +1876,7 @@ int fsl_ddr_interactive_env_var_exists(void)
 {
        char buffer[CONFIG_SYS_CBSIZE];
 
-       if (getenv_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
+       if (env_get_f("ddr_interactive", buffer, CONFIG_SYS_CBSIZE) >= 0)
                return 1;
 
        return 0;
@@ -1839,11 +1906,11 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set)
        };
 
        if (var_is_set) {
-               if (getenv_f("ddr_interactive", buffer2, CONFIG_SYS_CBSIZE) > 0) {
+               if (env_get_f("ddr_interactive", buffer2,
+                             CONFIG_SYS_CBSIZE) > 0)
                        p = buffer2;
-               } else {
+               else
                        var_is_set = 0;
-               }
        }
 
        /*