clk: renesas: Pull Gen3 specific bits into separate header

[u-boot] / drivers / ddr / fsl / util.c

diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index b58784be65d20d35840000f690720e1b8a0f4a2c..d6e6e78de3241fbbb52c4412edd886827b126a08 100644 (file)
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -13,6 +13,10 @@
 #include <fsl_ddr.h>
 #include <fsl_immap.h>
 #include <asm/io.h>
+#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
+       defined(CONFIG_ARM)
+#include <asm/arch/clock.h>
+#endif
 
 /* To avoid 64-bit full-divides, we factor this here */
 #define ULL_2E12 2000000000000ULL
@@ -386,7 +390,7 @@ void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl,
 
 void remove_unused_controllers(fsl_ddr_info_t *info)
 {
-#ifdef CONFIG_FSL_LSCH3
+#ifdef CONFIG_SYS_FSL_HAS_CCN504
        int i;
        u64 nodeid;
        void *hnf_sam_ctrl = (void *)(CCI_HN_F_0_BASE + CCN_HN_F_SAM_CTL);