ARM: mvebu: a38x: remove some unused code

[u-boot] / drivers / ddr / marvell / a38x / ddr3_hws_hw_training_def.h

diff --git a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
index 7500a72403d8b3ef49633cab67a075608ee7a2c4..a87fc404cb7d9f62d43583619e23749ae6ca7abb 100644 (file)
--- a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
+++ b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
@@ -1,7 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * Copyright (C) Marvell International Ltd. and its affiliates
- *
- * SPDX-License-Identifier:    GPL-2.0
  */
 
 #ifndef _DDR3_HWS_HW_TRAINING_DEF_H
@@ -23,8 +22,8 @@
 
 #define CPU_CONFIGURATION_REG(id)      (0x21800 + (id * 0x100))
 #define CPU_MRVL_ID_OFFSET             0x10
-#define SAR1_CPU_CORE_MASK             0x00000018
-#define SAR1_CPU_CORE_OFFSET           3
+#define SAR1_CPU_CORE_MASK             0x38000000
+#define SAR1_CPU_CORE_OFFSET           27
 
 #define NEW_FABRIC_TWSI_ADDR           0x4e
 #ifdef DB_784MP_GP
@@ -422,8 +421,6 @@
 
 /* Power Management Clock Gating Control Register */
 #define POWER_MNG_CTRL_REG                     0x18220
-#define PEX_DEVICE_AND_VENDOR_ID               0x000
-#define PEX_CFG_DIRECT_ACCESS(if, reg) (PEX_IF_REGS_BASE(if) + (reg))
 #define PMC_PEXSTOPCLOCK_OFFS(p)       ((p) < 8 ? (5 + (p)) : (18 + (p)))
 #define PMC_PEXSTOPCLOCK_MASK(p)       (1 << PMC_PEXSTOPCLOCK_OFFS(p))
 #define PMC_PEXSTOPCLOCK_EN(p)         (1 << PMC_PEXSTOPCLOCK_OFFS(p))
@@ -461,7 +458,4 @@
 #define CLK_CPU_2200                   13
 #define CLK_CPU_2400                   14
 
-#define SAR1_CPU_CORE_MASK             0x00000018
-#define SAR1_CPU_CORE_OFFSET           3
-
 #endif /* _DDR3_HWS_HW_TRAINING_DEF_H */