spl: use different BOARD_INIT MACRO for spl and tpl

[u-boot] / drivers / fpga / Kconfig

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 1ba02f09825aeb5b87788f42ddce4b10586797b3..6b2c866319c76742f30977e6e256020bf87596f2 100644 (file)
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -1,3 +1,48 @@
 menu "FPGA support"
 
+config FPGA
+       bool
+
+config FPGA_ALTERA
+       bool "Enable Altera FPGA drivers"
+       select FPGA
+       help
+         Say Y here to enable the Altera FPGA driver
+
+         This provides basic infrastructure to support Altera FPGA devices.
+         Enable Altera FPGA specific functions which includes bitstream
+         (in BIT format), fpga and device validation.
+
+config FPGA_SOCFPGA
+       bool "Enable Gen5 and Arria10 common FPGA drivers"
+       select FPGA_ALTERA
+       help
+         Say Y here to enable the Gen5 and Arria10 common FPGA driver
+
+         This provides common functionality for Gen5 and Arria10 devices.
+
+config FPGA_CYCLON2
+       bool "Enable Altera FPGA driver for Cyclone II"
+       depends on FPGA_ALTERA
+       help
+         Say Y here to enable the Altera Cyclone II FPGA specific driver
+
+         This provides common functionality for Altera Cyclone II devices.
+         Enable FPGA driver for loading bitstream in BIT and BIN format
+         on Altera Cyclone II device.
+
+config FPGA_XILINX
+       bool "Enable Xilinx FPGA drivers"
+       select FPGA
+       help
+         Enable Xilinx FPGA specific functions which includes bitstream
+         (in BIT format), fpga and device validation.
+
+config FPGA_ZYNQMPPL
+       bool "Enable Xilinx FPGA driver for ZynqMP"
+       depends on FPGA_XILINX
+       help
+         Enable FPGA driver for loading bitstream in BIT and BIN format
+         on Xilinx Zynq UltraScale+ (ZynqMP) device.
+
 endmenu