#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
#endif
-static int CYC2_ps_load( Altera_desc *desc, void *buf, size_t bsize );
-static int CYC2_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
+static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize);
+static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize);
/* static int CYC2_ps_info( Altera_desc *desc ); */
/* ------------------------------------------------------------------------- */
/* CYCLON2 Generic Implementation */
-int CYC2_load (Altera_desc * desc, void *buf, size_t bsize)
+int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
ret_val = CYC2_ps_load (desc, buf, bsize);
break;
+ case fast_passive_parallel:
+ /* Fast Passive Parallel (FPP) and PS only differ in what is
+ * done in the write() callback. Use the existing PS load
+ * function for FPP, too.
+ */
+ PRINTF ("%s: Launching Fast Passive Parallel Loader\n",
+ __FUNCTION__);
+ ret_val = CYC2_ps_load(desc, buf, bsize);
+ break;
+
/* Add new interface types here */
default:
return ret_val;
}
-int CYC2_dump (Altera_desc * desc, void *buf, size_t bsize)
+int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL;
/* ------------------------------------------------------------------------- */
/* CYCLON2 Passive Serial Generic Implementation */
-static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize)
+static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize)
{
int ret_val = FPGA_FAIL; /* assume the worst */
Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
return ret_val;
}
-static int CYC2_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
+static int CYC2_ps_dump(Altera_desc *desc, const void *buf, size_t bsize)
{
/* Readback is only available through the Slave Parallel and */
/* boundary-scan interfaces. */