mtd: nand: mxs_nand_spl: refactor mxs_flash_ident

[u-boot] / drivers / fpga / spartan2.c

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index bd317095c6567d27df247677fb36d15c02c20c7f..3435400e58bd2518bb14446a640833e269ae93b4 100644 (file)
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -1,8 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>            /* core U-Boot definitions */
@@ -31,17 +30,18 @@
 #define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
 #endif
 
-static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan2_sp_info(Xilinx_desc *desc ); */
+static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_sp_info(xilinx_desc *desc ); */
 
-static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
-/* static int spartan2_ss_info(Xilinx_desc *desc ); */
+static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
+/* static int spartan2_ss_info(xilinx_desc *desc ); */
 
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
-int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                        bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;
 
@@ -64,7 +64,7 @@ int spartan2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;
 
@@ -87,7 +87,7 @@ int spartan2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-int spartan2_info(Xilinx_desc *desc)
+static int spartan2_info(xilinx_desc *desc)
 {
        return FPGA_SUCCESS;
 }
@@ -96,7 +96,7 @@ int spartan2_info(Xilinx_desc *desc)
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Slave Parallel Generic Implementation */
 
-static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_load(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;        /* assume the worst */
        xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
@@ -248,7 +248,7 @@ static int spartan2_sp_load(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_sp_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;        /* assume the worst */
        xilinx_spartan2_slave_parallel_fns *fn = desc->iface_fns;
@@ -296,7 +296,7 @@ static int spartan2_sp_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
 
 /* ------------------------------------------------------------------------- */
 
-static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;        /* assume the worst */
        xilinx_spartan2_slave_serial_fns *fn = desc->iface_fns;
@@ -439,7 +439,7 @@ static int spartan2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        /* Readback is only available through the Slave Parallel and         */
        /* boundary-scan interfaces.                                         */
@@ -447,3 +447,9 @@ static int spartan2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
                        __FUNCTION__);
        return FPGA_FAIL;
 }
+
+struct xilinx_fpga_op spartan2_op = {
+       .load = spartan2_load,
+       .dump = spartan2_dump,
+       .info = spartan2_info,
+};