net: sun8i-emac: set mux and clock by driver data

[u-boot] / drivers / fpga / virtex2.c

diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 1cd9046a2487105b96f226fbcf4771fc9028444a..02773d6a0e4841306f793bfb9c8322384d618357 100644 (file)
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2002
  * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  * Keith Outwater, keith_outwater@mvis.com
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -12,6 +11,7 @@
  */
 
 #include <common.h>
+#include <console.h>
 #include <virtex2.h>
 
 #if 0
@@ -84,13 +84,14 @@
 #define CONFIG_SYS_FPGA_WAIT_CONFIG    CONFIG_SYS_HZ/5 /* 200 ms */
 #endif
 
-static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
-static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize);
-static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
+static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
-int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
+                       bitstream_type bstype)
 {
        int ret_val = FPGA_FAIL;
 
@@ -112,7 +113,7 @@ int virtex2_load(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;
 
@@ -134,7 +135,7 @@ int virtex2_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-int virtex2_info(Xilinx_desc *desc)
+static int virtex2_info(xilinx_desc *desc)
 {
        return FPGA_SUCCESS;
 }
@@ -153,7 +154,7 @@ int virtex2_info(Xilinx_desc *desc)
  *    INIT_B and DONE lines.  If both are high, configuration has
  *    succeeded. Congratulations!
  */
-static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_load(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;
        xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
@@ -352,7 +353,7 @@ static int virtex2_ssm_load(Xilinx_desc *desc, const void *buf, size_t bsize)
 /*
  * Read the FPGA configuration data
  */
-static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ssm_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        int ret_val = FPGA_FAIL;
        xilinx_virtex2_slave_selectmap_fns *fn = desc->iface_fns;
@@ -404,16 +405,22 @@ static int virtex2_ssm_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
        return ret_val;
 }
 
-static int virtex2_ss_load(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
        return FPGA_FAIL;
 }
 
-static int virtex2_ss_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
+static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize)
 {
        printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
        return FPGA_FAIL;
 }
 
 /* vim: set ts=4 tw=78: */
+
+struct xilinx_fpga_op virtex2_op = {
+       .load = virtex2_load,
+       .dump = virtex2_dump,
+       .info = virtex2_info,
+};