dm: core: Add ofnode function to read a 64-bit int

[u-boot] / drivers / gpio / mvgpio.h

diff --git a/drivers/gpio/mvgpio.h b/drivers/gpio/mvgpio.h
index 9688797badb4b3411aa878844d779350e77d1057..d68c48e637372bb8cf1f4ddd21f25c801c40f165 100644 (file)
--- a/drivers/gpio/mvgpio.h
+++ b/drivers/gpio/mvgpio.h
@@ -1,28 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2011
  * eInfochips Ltd. <www.einfochips.com>
- * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
+ * Written-by: Ajay Bhargav <contact@8051projects.net>
  *
  * (C) Copyright 2010
  * Marvell Semiconductor <www.marvell.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
  */
 
 #ifndef __MVGPIO_H__
@@ -30,9 +13,8 @@
 
 #include <common.h>
 
-#ifdef CONFIG_SHEEVA_88SV331xV5
 /*
- * GPIO Register map for SHEEVA 88SV331xV5
+ * GPIO Register map for Marvell SOCs
  */
 struct gpio_reg {
        u32 gplr;       /* Pin Level Register - 0x0000 */
@@ -67,8 +49,5 @@ struct gpio_reg {
        u32 pad12[2];
        u32 apmask;     /* Bitwise Mask of Edge Detect Register - 0x009C */
 };
-#else
-#error "CPU core subversion not defined"
-#endif
 
 #endif /* __MVGPIO_H__ */