rockchip: add early uart driver

[u-boot] / drivers / gpio / pca953x.c

diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index be1374592151b415c428182340a463c3c48492e0..c8c863765b6db72b86c2e6c468c518c3168b259f 100644 (file)
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -47,9 +47,6 @@ struct pca953x_chip_ngpio {
 static struct pca953x_chip_ngpio pca953x_chip_ngpios[] =
     CONFIG_SYS_I2C_PCA953X_WIDTH;
 
-#define NUM_CHIP_GPIOS (sizeof(pca953x_chip_ngpios) / \
-                       sizeof(struct pca953x_chip_ngpio))
-
 /*
  * Determine the number of GPIO pins supported. If we don't know we assume
  * 8 pins.
@@ -58,7 +55,7 @@ static int pca953x_ngpio(uint8_t chip)
 {
        int i;
 
-       for (i = 0; i < NUM_CHIP_GPIOS; i++)
+       for (i = 0; i < ARRAY_SIZE(pca953x_chip_ngpios); i++)
                if (pca953x_chip_ngpios[i].chip == chip)
                        return pca953x_chip_ngpios[i].ngpio;
 
@@ -91,8 +88,10 @@ static int pca953x_reg_write(uint8_t chip, uint addr, uint mask, uint data)
                if (i2c_read(chip, addr << 1, 1, (u8*)&valw, 2))
                        return -1;
 
+               valw = le16_to_cpu(valw);
                valw &= ~mask;
                valw |= data;
+               valw = cpu_to_le16(valw);
 
                return i2c_write(chip, addr << 1, 1, (u8*)&valw, 2);
        }
@@ -110,7 +109,7 @@ static int pca953x_reg_read(uint8_t chip, uint addr, uint *data)
        } else {
                if (i2c_read(chip, addr << 1, 1, (u8*)&valw, 2))
                        return -1;
-               *data = (int)valw;
+               *data = (uint)le16_to_cpu(valw);
        }
        return 0;
 }