dm: core: Add ofnode function to read a 64-bit int

[u-boot] / drivers / gpio / rk_gpio.c

diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index fbdf9f3fd9b1c8c1026ac4d24023ef356fe57e2d..a8f311bbd675af265477e60f47cdab6ae9b640e9 100644 (file)
--- a/drivers/gpio/rk_gpio.c
+++ b/drivers/gpio/rk_gpio.c
@@ -1,18 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2015 Google, Inc
  *
  * (C) Copyright 2008-2014 Rockchip Electronics
  * Peter, Software Engineering, <superpeter.cai@gmail.com>.
- *
- * SPDX-License-Identifier:     GPL-2.0+
  */
 
 #include <common.h>
 #include <dm.h>
-#include <asm/errno.h>
+#include <syscon.h>
+#include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
-#include <dt-bindings/gpio/gpio.h>
+#include <asm/arch/clock.h>
+#include <dm/pinctrl.h>
+#include <dt-bindings/clock/rk3288-cru.h>
 
 enum {
        ROCKCHIP_GPIOS_PER_BANK         = 32,
@@ -22,6 +24,8 @@ enum {
 
 struct rockchip_gpio_priv {
        struct rockchip_gpio_regs *regs;
+       struct udevice *pinctrl;
+       int bank;
        char name[2];
 };
 
@@ -53,7 +57,7 @@ static int rockchip_gpio_get_value(struct udevice *dev, unsigned offset)
        struct rockchip_gpio_priv *priv = dev_get_priv(dev);
        struct rockchip_gpio_regs *regs = priv->regs;
 
-       return readl(&regs->ext_port) & OFFSET_TO_BIT(offset);
+       return readl(&regs->ext_port) & OFFSET_TO_BIT(offset) ? 1 : 0;
 }
 
 static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset,
@@ -70,16 +74,21 @@ static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset,
 
 static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)
 {
-       return -ENOSYS;
-}
+#ifdef CONFIG_SPL_BUILD
+       return -ENODATA;
+#else
+       struct rockchip_gpio_priv *priv = dev_get_priv(dev);
+       struct rockchip_gpio_regs *regs = priv->regs;
+       bool is_output;
+       int ret;
 
-static int rockchip_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
-                           struct fdtdec_phandle_args *args)
-{
-       desc->offset = args->args[0];
-       desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
+       ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset);
+       if (ret)
+               return ret;
+       is_output = readl(&regs->swport_ddr) & OFFSET_TO_BIT(offset);
 
-       return 0;
+       return is_output ? GPIOF_OUTPUT : GPIOF_INPUT;
+#endif
 }
 
 static int rockchip_gpio_probe(struct udevice *dev)
@@ -87,13 +96,17 @@ static int rockchip_gpio_probe(struct udevice *dev)
        struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
        struct rockchip_gpio_priv *priv = dev_get_priv(dev);
        char *end;
-       int bank;
+       int ret;
+
+       priv->regs = dev_read_addr_ptr(dev);
+       ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
+       if (ret)
+               return ret;
 
-       priv->regs = (struct rockchip_gpio_regs *)dev_get_addr(dev);
        uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
        end = strrchr(dev->name, '@');
-       bank = trailing_strtoln(dev->name, end);
-       priv->name[0] = 'A' + bank;
+       priv->bank = trailing_strtoln(dev->name, end);
+       priv->name[0] = 'A' + priv->bank;
        uc_priv->bank_name = priv->name;
 
        return 0;
@@ -105,7 +118,6 @@ static const struct dm_gpio_ops gpio_rockchip_ops = {
        .get_value              = rockchip_gpio_get_value,
        .set_value              = rockchip_gpio_set_value,
        .get_function           = rockchip_gpio_get_function,
-       .xlate                  = rockchip_gpio_xlate,
 };
 
 static const struct udevice_id rockchip_gpio_ids[] = {