rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evb

[u-boot] / drivers / i2c / designware_i2c.c

diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index e60fd0a41903b811a98f0bcc88bf6ac8ae9519de..8cfed2194c54de741420f2050d0090222068526c 100644 (file)
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -249,6 +249,7 @@ static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr,
                         int alen, u8 *buffer, int len)
 {
        unsigned long start_time_rx;
+       unsigned int active = 0;
 
 #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
        /*
@@ -274,18 +275,28 @@ static int __dw_i2c_read(struct i2c_regs *i2c_base, u8 dev, uint addr,
 
        start_time_rx = get_timer(0);
        while (len) {
-               if (len == 1)
-                       writel(IC_CMD | IC_STOP, &i2c_base->ic_cmd_data);
-               else
-                       writel(IC_CMD, &i2c_base->ic_cmd_data);
+               if (!active) {
+                       /*
+                        * Avoid writing to ic_cmd_data multiple times
+                        * in case this loop spins too quickly and the
+                        * ic_status RFNE bit isn't set after the first
+                        * write. Subsequent writes to ic_cmd_data can
+                        * trigger spurious i2c transfer.
+                        */
+                       if (len == 1)
+                               writel(IC_CMD | IC_STOP, &i2c_base->ic_cmd_data);
+                       else
+                               writel(IC_CMD, &i2c_base->ic_cmd_data);
+                       active = 1;
+               }
 
                if (readl(&i2c_base->ic_status) & IC_STATUS_RFNE) {
                        *buffer++ = (uchar)readl(&i2c_base->ic_cmd_data);
                        len--;
                        start_time_rx = get_timer(0);
-
+                       active = 0;
                } else if (get_timer(start_time_rx) > I2C_BYTE_TO) {
-                               return 1;
+                       return 1;
                }
        }
 
@@ -363,7 +374,8 @@ static void __dw_i2c_init(struct i2c_regs *i2c_base, int speed, int slaveaddr)
        /* Disable i2c */
        dw_i2c_enable(i2c_base, false);
 
-       writel((IC_CON_SD | IC_CON_SPD_FS | IC_CON_MM), &i2c_base->ic_con);
+       writel(IC_CON_SD | IC_CON_RE | IC_CON_SPD_FS | IC_CON_MM,
+              &i2c_base->ic_con);
        writel(IC_RX_TL, &i2c_base->ic_rx_tl);
        writel(IC_TX_TL, &i2c_base->ic_tx_tl);
        writel(IC_STOP_DET, &i2c_base->ic_intr_mask);
@@ -534,7 +546,7 @@ static int designware_i2c_probe(struct udevice *bus)
 #endif
 #endif
        } else {
-               priv->regs = (struct i2c_regs *)dev_get_addr_ptr(bus);
+               priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus);
        }
 
        __dw_i2c_init(priv->regs, 0, 0);