#include <common.h>
#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
#include <ioports.h>
+#include <asm/io.h>
#endif
-#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
+#if defined(CONFIG_AT91FAMILY)
#include <asm/io.h>
#include <asm/arch/hardware.h>
+#include <asm/arch/at91_pio.h>
+#ifdef CONFIG_AT91_LEGACY
+#include <asm/arch/gpio.h>
+#endif
#endif
#ifdef CONFIG_IXP425 /* only valid for IXP425 */
#include <asm/arch/ixp425.h>
#ifdef CONFIG_LPC2292
#include <asm/arch/hardware.h>
#endif
+#if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
+#include <asm/io.h>
+#endif
#include <i2c.h>
+#if defined(CONFIG_SOFT_I2C_GPIO_SCL)
+# include <asm/gpio.h>
+
+# ifndef I2C_GPIO_SYNC
+# define I2C_GPIO_SYNC
+# endif
+
+# ifndef I2C_INIT
+# define I2C_INIT \
+ do { \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SCL, "soft_i2c"); \
+ gpio_request(CONFIG_SOFT_I2C_GPIO_SDA, "soft_i2c"); \
+ } while (0)
+# endif
+
+# ifndef I2C_ACTIVE
+# define I2C_ACTIVE do { } while (0)
+# endif
+
+# ifndef I2C_TRISTATE
+# define I2C_TRISTATE do { } while (0)
+# endif
+
+# ifndef I2C_READ
+# define I2C_READ gpio_get_value(CONFIG_SOFT_I2C_GPIO_SDA)
+# endif
+
+# ifndef I2C_SDA
+# define I2C_SDA(bit) \
+ do { \
+ if (bit) \
+ gpio_direction_input(CONFIG_SOFT_I2C_GPIO_SDA); \
+ else \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SDA, 0); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_SCL
+# define I2C_SCL(bit) \
+ do { \
+ gpio_direction_output(CONFIG_SOFT_I2C_GPIO_SCL, bit); \
+ I2C_GPIO_SYNC; \
+ } while (0)
+# endif
+
+# ifndef I2C_DELAY
+# define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
+# endif
+
+#endif
+
/* #define DEBUG_I2C */
#ifdef DEBUG_I2C
DECLARE_GLOBAL_DATA_PTR;
#endif
-
/*-----------------------------------------------------------------------
* Definitions
*/
#define RETRIES 0
-
#define I2C_ACK 0 /* PD_SDA level to ack a byte */
#define I2C_NOACK 1 /* PD_SDA level to noack a byte */
#endif
#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
#endif /* CONFIG_I2C_MULTI_BUS */
/*-----------------------------------------------------------------------
* Local functions
*/
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
static void send_reset (void);
+#endif
static void send_start (void);
static void send_stop (void);
static void send_ack (int);
static int write_byte (uchar byte);
static uchar read_byte (int);
-
+#if !defined(CONFIG_SYS_I2C_INIT_BOARD)
/*-----------------------------------------------------------------------
* Send a reset sequence consisting of 9 clocks with the data signal high
* to clock any confused device back into an idle state. Also send a
*/
static void send_reset(void)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
int j;
I2C_SCL(1);
send_stop();
I2C_TRISTATE;
}
+#endif
/*-----------------------------------------------------------------------
* START: High -> Low on SDA while SCL is High
*/
static void send_start(void)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
I2C_DELAY;
I2C_SDA(1);
*/
static void send_stop(void)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
I2C_SCL(0);
I2C_DELAY;
I2C_TRISTATE;
}
-
/*-----------------------------------------------------------------------
* ack should be I2C_ACK or I2C_NOACK
*/
static void send_ack(int ack)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
I2C_SCL(0);
I2C_DELAY;
I2C_DELAY;
}
-
/*-----------------------------------------------------------------------
* Send 8 bits and look for an acknowledgement.
*/
static int write_byte(uchar data)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
int j;
int nack;
int i2c_set_bus_num(unsigned int bus)
{
- if (bus >= CFG_MAX_I2C_BUS)
+#if defined(CONFIG_I2C_MUX)
+ if (bus < CONFIG_SYS_MAX_I2C_BUS) {
+ i2c_bus_num = bus;
+ } else {
+ int ret;
+
+ ret = i2x_mux_select_mux(bus);
+ if (ret == 0)
+ i2c_bus_num = bus;
+ else
+ return ret;
+ }
+#else
+ if (bus >= CONFIG_SYS_MAX_I2C_BUS)
return -1;
i2c_bus_num = bus;
-
- return 0;
-}
-
-/* TODO: add 100/400k switching */
-unsigned int i2c_get_bus_speed(void)
-{
- return CFG_I2C_SPEED;
-}
-
-int i2c_set_bus_speed(unsigned int speed)
-{
- if (speed != CFG_I2C_SPEED)
- return -1;
-
+#endif
return 0;
}
#endif
*/
static uchar read_byte(int ack)
{
-#ifdef CONFIG_MPC8260
- volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
-#endif
-#ifdef CONFIG_8xx
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
+ I2C_SOFT_DECLARATIONS /* intentional without ';' */
int data;
int j;
*/
void i2c_init (int speed, int slaveaddr)
{
+#if defined(CONFIG_SYS_I2C_INIT_BOARD)
+ /* call board specific i2c bus reset routine before accessing the */
+ /* environment, which might be in a chip on that bus. For details */
+ /* about this problem see doc/I2C_Edge_Conditions. */
+ i2c_init_board();
+#else
/*
* WARNING: Do NOT save speed in a static variable: if the
* I2C routines are called before RAM is initialized (to read
* system will crash.
*/
send_reset ();
+#endif
}
/*-----------------------------------------------------------------------
PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
chip, addr, alen, buffer, len);
-#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
+#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
/*
* EEPROM chips that implement "address overflow" are ones
* like Catalyst 24WC04/08/16 which has 9/10/11 bits of
* still be one byte because the extra address bits are
* hidden in the chip address.
*/
- chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
+ chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
chip, addr);
}
shift -= 8;
}
- send_stop(); /* reportedly some chips need a full stop */
+
+ /* Some I2C chips need a stop/start sequence here,
+ * other chips don't work with a full stop and need
+ * only a start. Default behaviour is to send the
+ * stop/start sequence.
+ */
+#ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
send_start();
+#else
+ send_stop();
+ send_start();
+#endif
}
/*
* Send the chip address again, this time for a read cycle.
send_stop();
return(failures);
}
-
-/*-----------------------------------------------------------------------
- * Read a register
- */
-uchar i2c_reg_read(uchar i2c_addr, uchar reg)
-{
- uchar buf;
-
- i2c_read(i2c_addr, reg, 1, &buf, 1);
-
- return(buf);
-}
-
-/*-----------------------------------------------------------------------
- * Write a register
- */
-void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
-{
- i2c_write(i2c_addr, reg, 1, &val, 1);
-}
projects / u-boot / blobdiff