fsl: add register read-back to set_law()

[u-boot] / drivers / misc / fsl_law.c

diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 48ece4f090b8c2af5e9705529ad22fafa43f7de1..7bdd355c745fa985e5efb0c797688135dfa79ea5 100644 (file)
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -35,10 +35,12 @@ DECLARE_GLOBAL_DATA_PTR;
     defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
 #define FSL_HW_NUM_LAWS 8
 #elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
-      defined(CONFIG_MPC8568) || \
+      defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
       defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
 #define FSL_HW_NUM_LAWS 10
-#elif defined(CONFIG_MPC8572)
+#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \
+      defined(CONFIG_P1011) || defined(CONFIG_P1020) || \
+      defined(CONFIG_P2010) || defined(CONFIG_P2020)
 #define FSL_HW_NUM_LAWS 12
 #else
 #error FSL_HW_NUM_LAWS not defined for this platform
@@ -46,16 +48,18 @@ DECLARE_GLOBAL_DATA_PTR;
 
 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base + 8 * idx;
        volatile u32 *lawar = base + 8 * idx + 2;
 
        gd->used_laws |= (1 << idx);
 
+       out_be32(lawar, 0);
        out_be32(lawbar, addr >> 12);
        out_be32(lawar, LAWAR_EN | ((u32)id << 20) | (u32)sz);
 
-       return ;
+       /* Read back so that we sync the writes */
+       in_be32(lawar);
 }
 
 int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
@@ -91,7 +95,7 @@ int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id)
 
 void disable_law(u8 idx)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base + 8 * idx;
        volatile u32 *lawar = base + 8 * idx + 2;
 
@@ -105,7 +109,7 @@ void disable_law(u8 idx)
 
 void print_laws(void)
 {
-       volatile u32 *base = (volatile u32 *)(CFG_IMMR + 0xc08);
+       volatile u32 *base = (volatile u32 *)(CONFIG_SYS_IMMR + 0xc08);
        volatile u32 *lawbar = base;
        volatile u32 *lawar = base + 2;
        int i;
@@ -121,6 +125,48 @@ void print_laws(void)
        return;
 }
 
+/* use up to 2 LAWs for DDR, used the last available LAWs */
+int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
+{
+       u64 start_align, law_sz;
+       int law_sz_enc;
+
+       if (start == 0)
+               start_align = 1ull << (LAW_SIZE_32G + 1);
+       else
+               start_align = 1ull << (ffs64(start) - 1);
+       law_sz = min(start_align, sz);
+       law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+       if (set_last_law(start, law_sz_enc, id) < 0)
+               return -1;
+
+       /* recalculate size based on what was actually covered by the law */
+       law_sz = 1ull << __ilog2_u64(law_sz);
+
+       /* do we still have anything to map */
+       sz = sz - law_sz;
+       if (sz) {
+               start += law_sz;
+
+               start_align = 1ull << (ffs64(start) - 1);
+               law_sz = min(start_align, sz);
+               law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+               if (set_last_law(start, law_sz_enc, id) < 0)
+                       return -1;
+       } else {
+               return 0;
+       }
+
+       /* do we still have anything to map */
+       sz = sz - law_sz;
+       if (sz)
+               return 1;
+
+       return 0;
+}
+
 void init_laws(void)
 {
        int i;