mmc: sunxi: revive depends on UART0_PORT_F

[u-boot] / drivers / mmc / bcm2835_sdhci.c

diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 078ef0523a91b2f5b6762b8ecd0ac67ae64aeb5d..cb2bd40c65ee198753853c401e48ed8df3156a93 100644 (file)
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -69,11 +69,11 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
         * (Which is just as well - otherwise we'd have to nobble the DMA engine
         * too)
         */
-       while (get_timer(bcm_host->last_write) < bcm_host->twoticks_delay)
+       while (timer_get_us() - bcm_host->last_write < bcm_host->twoticks_delay)
                ;
 
        writel(val, host->ioaddr + reg);
-       bcm_host->last_write = get_timer(0);
+       bcm_host->last_write = timer_get_us();
 }
 
 static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)
@@ -157,7 +157,7 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
        bcm_host = calloc(1, sizeof(*bcm_host));
        if (!bcm_host) {
                printf("sdhci_host calloc fail!\n");
-               return 1;
+               return -ENOMEM;
        }
 
        /*
@@ -178,13 +178,12 @@ int bcm2835_sdhci_init(u32 regbase, u32 emmc_freq)
 
        host = &bcm_host->host;
        host->name = "bcm2835_sdhci";
-       host->ioaddr = (void *)regbase;
+       host->ioaddr = (void *)(unsigned long)regbase;
        host->quirks = SDHCI_QUIRK_BROKEN_VOLTAGE | SDHCI_QUIRK_BROKEN_R1B |
                SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_NO_HISPD_BIT;
        host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
        host->ops = &bcm2835_ops;
 
-       host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
        add_sdhci(host, emmc_freq, MIN_FREQ);
 
        return 0;