Blackfin: bfin_sdh: drop dos part hardcode

[u-boot] / drivers / mmc / bfin_sdh.c

diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 27d9bf6cbf985d167ec116c4fadc25bd5752744f..8d59d46c646878b866834bf72eb9649c1e2b5f4f 100644 (file)
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -19,7 +19,7 @@
 #include <asm/mach-common/bits/sdh.h>
 #include <asm/mach-common/bits/dma.h>
 
-#if defined(__ADSPBF51x__)
+#if defined(__ADSPBF50x__) || defined(__ADSPBF51x__)
 # define bfin_read_SDH_PWR_CTL         bfin_read_RSI_PWR_CONTROL
 # define bfin_write_SDH_PWR_CTL                bfin_write_RSI_PWR_CONTROL
 # define bfin_read_SDH_CLK_CTL         bfin_read_RSI_CLK_CONTROL
@@ -114,25 +114,26 @@ static int sdh_setup_data(struct mmc *mmc, struct mmc_data *data)
        u16 data_ctl = 0;
        u16 dma_cfg = 0;
        int ret = 0;
+       unsigned long data_size = data->blocksize * data->blocks;
 
        /* Don't support write yet. */
        if (data->flags & MMC_DATA_WRITE)
                return UNUSABLE_ERR;
-       data_ctl |= ((ffs(data->blocksize) - 1) << 4);
+       data_ctl |= ((ffs(data_size) - 1) << 4);
        data_ctl |= DTX_DIR;
        bfin_write_SDH_DATA_CTL(data_ctl);
        dma_cfg = WDSIZE_32 | RESTART | WNR | DMAEN;
 
-       bfin_write_SDH_DATA_TIMER(0xFFFF);
+       bfin_write_SDH_DATA_TIMER(-1);
 
        blackfin_dcache_flush_invalidate_range(data->dest,
-                       data->dest + data->blocksize);
+                       data->dest + data_size);
        /* configure DMA */
        bfin_write_DMA_START_ADDR(data->dest);
-       bfin_write_DMA_X_COUNT(data->blocksize / 4);
+       bfin_write_DMA_X_COUNT(data_size / 4);
        bfin_write_DMA_X_MODIFY(4);
        bfin_write_DMA_CONFIG(dma_cfg);
-       bfin_write_SDH_DATA_LGTH(data->blocksize);
+       bfin_write_SDH_DATA_LGTH(data_size);
        /* kick off transfer */
        bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
 
@@ -249,12 +250,14 @@ int bfin_mmc_init(bd_t *bis)
        mmc->send_cmd = bfin_sdh_request;
        mmc->set_ios = bfin_sdh_set_ios;
        mmc->init = bfin_sdh_init;
+       mmc->getcd = NULL;
        mmc->host_caps = MMC_MODE_4BIT;
 
        mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
        mmc->f_max = get_sclk();
        mmc->f_min = mmc->f_max >> 9;
-       mmc->block_dev.part_type = PART_TYPE_DOS;
+
+       mmc->b_max = 0;
 
        mmc_register(mmc);