]> git.sur5r.net Git - u-boot/blobdiff - drivers/mmc/dw_mmc.c
pci: Set PCI_COMMAND_IO bit for VGA device
[u-boot] / drivers / mmc / dw_mmc.c
index d34e4ee9dde19e43a7ba739a83f322b36d91ec60..26d34ae5ccc4d0349b27e1dda3128dfbfb84ebf9 100644 (file)
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <errno.h>
 #include <malloc.h>
+#include <memalign.h>
 #include <mmc.h>
 #include <dwmmc.h>
 #include <asm-generic/errno.h>
@@ -213,7 +214,7 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
 
        if (data) {
                start = get_timer(0);
-               timeout = 1000;
+               timeout = 240000;
                for (;;) {
                        mask = dwmci_readl(host, DWMCI_RINTSTS);
                        /* Error during data transfer. */
@@ -266,7 +267,7 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq)
         * host->bus_hz should be set by user.
         */
        if (host->get_mmc_clk)
-               sclk = host->get_mmc_clk(host);
+               sclk = host->get_mmc_clk(host, freq);
        else if (host->bus_hz)
                sclk = host->bus_hz;
        else {
@@ -373,9 +374,15 @@ static int dwmci_init(struct mmc *mmc)
        dwmci_writel(host, DWMCI_IDINTEN, 0);
        dwmci_writel(host, DWMCI_BMOD, 1);
 
-       if (host->fifoth_val) {
-               dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
+       if (!host->fifoth_val) {
+               uint32_t fifo_size;
+
+               fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
+               fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1;
+               host->fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) |
+                               TX_WMARK(fifo_size / 2);
        }
+       dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
 
        dwmci_writel(host, DWMCI_CLKENA, 0);
        dwmci_writel(host, DWMCI_CLKSRC, 0);