+// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015 Google, Inc
* Written by Simon Glass <sjg@chromium.org>
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <dm.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
-#include <dm/root.h>
#include "mmc_private.h"
-DECLARE_GLOBAL_DATA_PTR;
-
int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
dm_mmc_send_init_stream(mmc->dev);
}
+#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout)
{
struct dm_mmc_ops *ops = mmc_get_ops(dev);
{
return dm_mmc_wait_dat0(mmc->dev, state, timeout);
}
+#endif
int dm_mmc_get_wp(struct udevice *dev)
{
return dm_mmc_get_cd(mmc->dev);
}
+#ifdef MMC_SUPPORTS_TUNING
int dm_mmc_execute_tuning(struct udevice *dev, uint opcode)
{
struct dm_mmc_ops *ops = mmc_get_ops(dev);
{
return dm_mmc_execute_tuning(mmc->dev, opcode);
}
+#endif
-int mmc_of_parse(const void *fdt, int node, struct mmc_config *cfg)
+int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg)
{
int val;
- val = fdtdec_get_int(fdt, node, "bus-width", 1);
+ val = dev_read_u32_default(dev, "bus-width", 1);
switch (val) {
case 0x8:
cfg->host_caps |= MMC_MODE_1BIT;
break;
default:
- printf("error: %s invalid bus-width property %d\n",
- fdt_get_name(fdt, node, NULL), val);
- return -ENOENT;
+ dev_err(dev, "Invalid \"bus-width\" value %u!\n", val);
+ return -EINVAL;
}
- cfg->f_max = fdtdec_get_int(fdt, node, "max-frequency", 52000000);
+ /* f_max is obtained from the optional "max-frequency" property */
+ dev_read_u32(dev, "max-frequency", &cfg->f_max);
- if (fdtdec_get_bool(fdt, node, "cap-sd-highspeed"))
+ if (dev_read_bool(dev, "cap-sd-highspeed"))
cfg->host_caps |= MMC_CAP(SD_HS);
- if (fdtdec_get_bool(fdt, node, "cap-mmc-highspeed"))
+ if (dev_read_bool(dev, "cap-mmc-highspeed"))
cfg->host_caps |= MMC_CAP(MMC_HS);
- if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr12"))
+ if (dev_read_bool(dev, "sd-uhs-sdr12"))
cfg->host_caps |= MMC_CAP(UHS_SDR12);
- if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr25"))
+ if (dev_read_bool(dev, "sd-uhs-sdr25"))
cfg->host_caps |= MMC_CAP(UHS_SDR25);
- if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr50"))
+ if (dev_read_bool(dev, "sd-uhs-sdr50"))
cfg->host_caps |= MMC_CAP(UHS_SDR50);
- if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr104"))
+ if (dev_read_bool(dev, "sd-uhs-sdr104"))
cfg->host_caps |= MMC_CAP(UHS_SDR104);
- if (fdtdec_get_bool(fdt, node, "sd-uhs-ddr50"))
+ if (dev_read_bool(dev, "sd-uhs-ddr50"))
cfg->host_caps |= MMC_CAP(UHS_DDR50);
- if (fdtdec_get_bool(fdt, node, "mmc-ddr-1_8v"))
+ if (dev_read_bool(dev, "mmc-ddr-1_8v"))
cfg->host_caps |= MMC_CAP(MMC_DDR_52);
- if (fdtdec_get_bool(fdt, node, "mmc-hs200-1_8v"))
+ if (dev_read_bool(dev, "mmc-ddr-1_2v"))
+ cfg->host_caps |= MMC_CAP(MMC_DDR_52);
+ if (dev_read_bool(dev, "mmc-hs200-1_8v"))
+ cfg->host_caps |= MMC_CAP(MMC_HS_200);
+ if (dev_read_bool(dev, "mmc-hs200-1_2v"))
cfg->host_caps |= MMC_CAP(MMC_HS_200);
return 0;
static const struct blk_ops mmc_blk_ops = {
.read = mmc_bread,
-#ifndef CONFIG_SPL_BUILD
+#if CONFIG_IS_ENABLED(MMC_WRITE)
.write = mmc_bwrite,
.erase = mmc_berase,
#endif