DWMMC: SMDK5420: Disable SMU for eMMC

[u-boot] / drivers / mmc / mxsmmc.c

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index b1537e24ac7bc163903e58056c24e98dabd0f225..245f9d0c6724a6ac865ac663effb55cfe5d5bfec 100644 (file)
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -15,23 +15,7 @@
  * (C) Copyright 2003
  * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 #include <common.h>
 #include <malloc.h>
@@ -41,7 +25,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/arch/dma.h>
+#include <asm/imx-common/dma.h>
 #include <bouncebuf.h>
 
 struct mxsmmc_priv {
@@ -420,12 +404,14 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int))
        mmc->set_ios = mxsmmc_set_ios;
        mmc->init = mxsmmc_init;
        mmc->getcd = NULL;
+       mmc->getwp = NULL;
        mmc->priv = priv;
 
        mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 
        mmc->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT |
-                        MMC_MODE_HS_52MHz | MMC_MODE_HS;
+                        MMC_MODE_HS_52MHz | MMC_MODE_HS |
+                        MMC_MODE_HC;
 
        /*
         * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz