]> git.sur5r.net Git - u-boot/blobdiff - drivers/mmc/omap_hsmmc.c
net: gem: Add support for phy autodetection
[u-boot] / drivers / mmc / omap_hsmmc.c
index cb1a7bdd6544ac00631c88006bc3c06cac22b7b6..166744c3204ff4a8d1701fc37cae80f08f2f39f3 100644 (file)
@@ -42,6 +42,7 @@
 struct omap_hsmmc_data {
        struct hsmmc *base_addr;
        int cd_gpio;
+       int wp_gpio;
 };
 
 /* If we fail after 1 second wait, something is really bad */
@@ -74,6 +75,12 @@ static int omap_mmc_getcd(struct mmc *mmc)
        int cd_gpio = ((struct omap_hsmmc_data *)mmc->priv)->cd_gpio;
        return gpio_get_value(cd_gpio);
 }
+
+static int omap_mmc_getwp(struct mmc *mmc)
+{
+       int wp_gpio = ((struct omap_hsmmc_data *)mmc->priv)->wp_gpio;
+       return gpio_get_value(wp_gpio);
+}
 #else
 static inline int omap_mmc_setup_gpio_in(int gpio, const char *label)
 {
@@ -81,24 +88,22 @@ static inline int omap_mmc_setup_gpio_in(int gpio, const char *label)
 }
 
 #define omap_mmc_getcd NULL
+#define omap_mmc_getwp NULL
 #endif
 
 #if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER)
 static void omap4_vmmc_pbias_config(struct mmc *mmc)
 {
        u32 value = 0;
-       struct omap_sys_ctrl_regs *const ctrl =
-               (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
 
-
-       value = readl(&ctrl->control_pbiaslite);
+       value = readl((*ctrl)->control_pbiaslite);
        value &= ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ);
-       writel(value, &ctrl->control_pbiaslite);
+       writel(value, (*ctrl)->control_pbiaslite);
        /* set VMMC to 3V */
        twl6030_power_mmc_init();
-       value = readl(&ctrl->control_pbiaslite);
+       value = readl((*ctrl)->control_pbiaslite);
        value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ;
-       writel(value, &ctrl->control_pbiaslite);
+       writel(value, (*ctrl)->control_pbiaslite);
 }
 #endif
 
@@ -106,26 +111,24 @@ static void omap4_vmmc_pbias_config(struct mmc *mmc)
 static void omap5_pbias_config(struct mmc *mmc)
 {
        u32 value = 0;
-       struct omap_sys_ctrl_regs *const ctrl =
-               (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
 
-       value = readl(&ctrl->control_pbias);
+       value = readl((*ctrl)->control_pbias);
        value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
        value |= SDCARD_BIAS_HIZ_MODE;
-       writel(value, &ctrl->control_pbias);
+       writel(value, (*ctrl)->control_pbias);
 
        twl6035_mmc1_poweron_ldo();
 
-       value = readl(&ctrl->control_pbias);
+       value = readl((*ctrl)->control_pbias);
        value &= ~SDCARD_BIAS_HIZ_MODE;
        value |= SDCARD_PBIASLITE_VMODE | SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ;
-       writel(value, &ctrl->control_pbias);
+       writel(value, (*ctrl)->control_pbias);
 
-       value = readl(&ctrl->control_pbias);
+       value = readl((*ctrl)->control_pbias);
        if (value & (1 << 23)) {
                value &= ~(SDCARD_PWRDNZ | SDCARD_BIAS_PWRDNZ);
                value |= SDCARD_BIAS_HIZ_MODE;
-               writel(value, &ctrl->control_pbias);
+               writel(value, (*ctrl)->control_pbias);
        }
 }
 #endif
@@ -580,7 +583,8 @@ static void mmc_set_ios(struct mmc *mmc)
        writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl);
 }
 
-int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio)
+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
+               int wp_gpio)
 {
        struct mmc *mmc = &hsmmc_dev[dev_index];
        struct omap_hsmmc_data *priv_data = &hsmmc_dev_data[dev_index];
@@ -589,7 +593,6 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio)
        mmc->send_cmd = mmc_send_cmd;
        mmc->set_ios = mmc_set_ios;
        mmc->init = mmc_init_setup;
-       mmc->getcd = omap_mmc_getcd;
        mmc->priv = priv_data;
 
        switch (dev_index) {
@@ -611,6 +614,13 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio)
                return 1;
        }
        priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd");
+       if (priv_data->cd_gpio != -1)
+               mmc->getcd = omap_mmc_getcd;
+
+       priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp");
+       if (priv_data->wp_gpio != -1)
+               mmc->getwp = omap_mmc_getwp;
+
        mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
        mmc->host_caps = (MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS |
                                MMC_MODE_HC) & ~host_caps_mask;