]> git.sur5r.net Git - u-boot/blobdiff - drivers/mmc/sdhci.c
SPDX: Convert all of our single license tags to Linux Kernel style
[u-boot] / drivers / mmc / sdhci.c
index c94d58db65c70ee8b32cd64e79ebd1b8f44dc262..758850fc3b4edd85c401bb65d6a1f2121e33c5e5 100644 (file)
@@ -1,9 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2011, Marvell Semiconductor Inc.
  * Lei Wen <leiwen@marvell.com>
  *
- * SPDX-License-Identifier:    GPL-2.0+
- *
  * Back ported to the 8xx platform (from the 8260 platform) by
  * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
  */
@@ -72,6 +71,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
                                unsigned int start_addr)
 {
        unsigned int stat, rdy, mask, timeout, block = 0;
+       bool transfer_done = false;
 #ifdef CONFIG_MMC_SDHCI_SDMA
        unsigned char ctrl;
        ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
@@ -85,21 +85,27 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
        do {
                stat = sdhci_readl(host, SDHCI_INT_STATUS);
                if (stat & SDHCI_INT_ERROR) {
-                       printf("%s: Error detected in status(0x%X)!\n",
-                              __func__, stat);
+                       pr_debug("%s: Error detected in status(0x%X)!\n",
+                                __func__, stat);
                        return -EIO;
                }
-               if (stat & rdy) {
+               if (!transfer_done && (stat & rdy)) {
                        if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & mask))
                                continue;
                        sdhci_writel(host, rdy, SDHCI_INT_STATUS);
                        sdhci_transfer_pio(host, data);
                        data->dest += data->blocksize;
-                       if (++block >= data->blocks)
-                               break;
+                       if (++block >= data->blocks) {
+                               /* Keep looping until the SDHCI_INT_DATA_END is
+                                * cleared, even if we finished sending all the
+                                * blocks.
+                                */
+                               transfer_done = true;
+                               continue;
+                       }
                }
 #ifdef CONFIG_MMC_SDHCI_SDMA
-               if (stat & SDHCI_INT_DMA_END) {
+               if (!transfer_done && (stat & SDHCI_INT_DMA_END)) {
                        sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
                        start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
                        start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
@@ -127,7 +133,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data,
 #define SDHCI_CMD_DEFAULT_TIMEOUT              100
 #define SDHCI_READ_STATUS_TIMEOUT              1000
 
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
 static int sdhci_send_command(struct udevice *dev, struct mmc_cmd *cmd,
                              struct mmc_data *data)
 {
@@ -150,7 +156,6 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
        /* Timeout unit - ms */
        static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT;
 
-       sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
        mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
 
        /* We shouldn't wait for data inihibit for stop commands, even
@@ -174,6 +179,8 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
                udelay(1000);
        }
 
+       sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
+
        mask = SDHCI_INT_RESPONSE;
        if (!(cmd->resp_type & MMC_RSP_PRESENT))
                flags = SDHCI_CMD_RESP_NONE;
@@ -194,7 +201,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
                flags |= SDHCI_CMD_DATA;
 
        /* Set Transfer mode regarding to data flag */
-       if (data != 0) {
+       if (data) {
                sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
                mode = SDHCI_TRNS_BLK_CNT_EN;
                trans_bytes = data->blocks * data->blocksize;
@@ -242,7 +249,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 
        sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
 #ifdef CONFIG_MMC_SDHCI_SDMA
-       if (data != 0) {
+       if (data) {
                trans_bytes = ALIGN(trans_bytes, CONFIG_SYS_CACHELINE_SIZE);
                flush_cache(start_addr, trans_bytes);
        }
@@ -325,8 +332,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
                 */
                if (host->clk_mul) {
                        for (div = 1; div <= 1024; div++) {
-                               if ((host->max_clk * host->clk_mul / div)
-                                       <= clock)
+                               if ((host->max_clk / div) <= clock)
                                        break;
                        }
 
@@ -416,7 +422,7 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
        sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
 }
 
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
 static int sdhci_set_ios(struct udevice *dev)
 {
        struct mmc *mmc = mmc_get_mmc_dev(dev);
@@ -455,7 +461,8 @@ static int sdhci_set_ios(struct mmc *mmc)
        else
                ctrl &= ~SDHCI_CTRL_HISPD;
 
-       if (host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)
+       if ((host->quirks & SDHCI_QUIRK_NO_HISPD_BIT) ||
+           (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE))
                ctrl &= ~SDHCI_CTRL_HISPD;
 
        sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
@@ -496,7 +503,7 @@ static int sdhci_init(struct mmc *mmc)
        return 0;
 }
 
-#ifdef CONFIG_DM_MMC_OPS
+#ifdef CONFIG_DM_MMC
 int sdhci_probe(struct udevice *dev)
 {
        struct mmc *mmc = mmc_get_mmc_dev(dev);
@@ -537,9 +544,17 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
                host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
 
        cfg->name = host->name;
-#ifndef CONFIG_DM_MMC_OPS
+#ifndef CONFIG_DM_MMC
        cfg->ops = &sdhci_ops;
 #endif
+
+       /* Check whether the clock multiplier is supported or not */
+       if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
+               caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+               host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
+                               SDHCI_CLOCK_MUL_SHIFT;
+       }
+
        if (host->max_clk == 0) {
                if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
                        host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
@@ -548,6 +563,8 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
                        host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) >>
                                SDHCI_CLOCK_BASE_SHIFT;
                host->max_clk *= 1000000;
+               if (host->clk_mul)
+                       host->max_clk *= host->clk_mul;
        }
        if (host->max_clk == 0) {
                printf("%s: Hardware doesn't specify base clock frequency\n",
@@ -577,17 +594,17 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
        if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE)
                cfg->voltages |= host->voltages;
 
-       cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
+       cfg->host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
 
        /* Since Host Controller Version3.0 */
        if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
                if (!(caps & SDHCI_CAN_DO_8BIT))
                        cfg->host_caps &= ~MMC_MODE_8BIT;
+       }
 
-               /* Find out whether clock multiplier is supported */
-               caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
-               host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
-                               SDHCI_CLOCK_MUL_SHIFT;
+       if (host->quirks & SDHCI_QUIRK_BROKEN_HISPD_MODE) {
+               cfg->host_caps &= ~MMC_MODE_HS;
+               cfg->host_caps &= ~MMC_MODE_HS_52MHz;
        }
 
        if (host->host_caps)