]> git.sur5r.net Git - u-boot/blobdiff - drivers/mmc/sdhci.c
mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new value
[u-boot] / drivers / mmc / sdhci.c
index 6ce5e8f0c76846a62e05adb20f105f117f8ebbd7..9902dbdca8f1ce254223882ce874a1789820ae77 100644 (file)
@@ -295,7 +295,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
 static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 {
        struct sdhci_host *host = mmc->priv;
-       unsigned int div, clk = 0, timeout, reg;
+       unsigned int div, clk = 0, timeout;
 
        /* Wait max 20 ms */
        timeout = 200;
@@ -311,9 +311,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
                udelay(100);
        }
 
-       reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-       reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
-       sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
+       sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 
        if (clock == 0)
                return 0;
@@ -325,7 +323,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
                 */
                if (host->clk_mul) {
                        for (div = 1; div <= 1024; div++) {
-                               if ((mmc->cfg->f_max * host->clk_mul / div)
+                               if ((host->max_clk * host->clk_mul / div)
                                        <= clock)
                                        break;
                        }
@@ -338,13 +336,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
                        div--;
                } else {
                        /* Version 3.00 divisors must be a multiple of 2. */
-                       if (mmc->cfg->f_max <= clock) {
+                       if (host->max_clk <= clock) {
                                div = 1;
                        } else {
                                for (div = 2;
                                     div < SDHCI_MAX_DIV_SPEC_300;
                                     div += 2) {
-                                       if ((mmc->cfg->f_max / div) <= clock)
+                                       if ((host->max_clk / div) <= clock)
                                                break;
                                }
                        }
@@ -353,13 +351,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
        } else {
                /* Version 2.00 divisors must be a power of 2. */
                for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) {
-                       if ((mmc->cfg->f_max / div) <= clock)
+                       if ((host->max_clk / div) <= clock)
                                break;
                }
                div >>= 1;
        }
 
-       if (host->ops->set_clock)
+       if (host->ops && host->ops->set_clock)
                host->ops->set_clock(host, div);
 
        clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
@@ -411,9 +409,6 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
                return;
        }
 
-       if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER)
-               sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
-
        pwr |= SDHCI_POWER_ON;
 
        sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
@@ -430,7 +425,7 @@ static int sdhci_set_ios(struct mmc *mmc)
        u32 ctrl;
        struct sdhci_host *host = mmc->priv;
 
-       if (host->ops->set_control_reg)
+       if (host->ops && host->ops->set_control_reg)
                host->ops->set_control_reg(host);
 
        if (mmc->clock != host->clock)
@@ -483,7 +478,7 @@ static int sdhci_init(struct mmc *mmc)
 
        sdhci_set_power(host, fls(mmc->cfg->voltages) - 1);
 
-       if (host->ops->get_cd)
+       if (host->ops && host->ops->get_cd)
                host->ops->get_cd(host);
 
        /* Enable only interrupts served by the SD controller */
@@ -516,7 +511,7 @@ static const struct mmc_ops sdhci_ops = {
 #endif
 
 int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
-               u32 max_clk, u32 min_clk)
+               u32 f_max, u32 f_min)
 {
        u32 caps, caps_1;
 
@@ -539,24 +534,26 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
 #ifndef CONFIG_DM_MMC_OPS
        cfg->ops = &sdhci_ops;
 #endif
-       if (max_clk)
-               cfg->f_max = max_clk;
-       else {
+       if (host->max_clk == 0) {
                if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
-                       cfg->f_max = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
+                       host->max_clk = (caps & SDHCI_CLOCK_V3_BASE_MASK) >>
                                SDHCI_CLOCK_BASE_SHIFT;
                else
-                       cfg->f_max = (caps & SDHCI_CLOCK_BASE_MASK) >>
+                       host->max_clk = (caps & SDHCI_CLOCK_BASE_MASK) >>
                                SDHCI_CLOCK_BASE_SHIFT;
-               cfg->f_max *= 1000000;
+               host->max_clk *= 1000000;
        }
-       if (cfg->f_max == 0) {
+       if (host->max_clk == 0) {
                printf("%s: Hardware doesn't specify base clock frequency\n",
                       __func__);
                return -EINVAL;
        }
-       if (min_clk)
-               cfg->f_min = min_clk;
+       if (f_max && (f_max < host->max_clk))
+               cfg->f_max = f_max;
+       else
+               cfg->f_max = host->max_clk;
+       if (f_min)
+               cfg->f_min = f_min;
        else {
                if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300)
                        cfg->f_min = cfg->f_max / SDHCI_MAX_DIV_SPEC_300;
@@ -575,9 +572,16 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
                cfg->voltages |= host->voltages;
 
        cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
+
+       /* Since Host Controller Version3.0 */
        if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
                if (!(caps & SDHCI_CAN_DO_8BIT))
                        cfg->host_caps &= ~MMC_MODE_8BIT;
+
+               /* Find out whether clock multiplier is supported */
+               caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
+               host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
+                               SDHCI_CLOCK_MUL_SHIFT;
        }
 
        if (host->host_caps)
@@ -585,16 +589,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
 
        cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
-       /*
-        * In case of Host Controller v3.00, find out whether clock
-        * multiplier is supported.
-        */
-       if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) {
-               caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
-               host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >>
-                               SDHCI_CLOCK_MUL_SHIFT;
-       }
-
        return 0;
 }
 
@@ -604,11 +598,11 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg)
        return mmc_bind(dev, mmc, cfg);
 }
 #else
-int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
+int add_sdhci(struct sdhci_host *host, u32 f_max, u32 f_min)
 {
        int ret;
 
-       ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk);
+       ret = sdhci_setup_cfg(&host->cfg, host, f_max, f_min);
        if (ret)
                return ret;