/*
- * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <clk.h>
#include <fdtdec.h>
-#include <mapmem.h>
#include <mmc.h>
-#include <dm/device.h>
+#include <dm.h>
#include <linux/compat.h>
#include <linux/io.h>
#include <linux/sizes.h>
/* alignment required by the DMA engine of this controller */
#define UNIPHIER_SD_DMA_MINALIGN 0x10
-struct uniphier_sd_priv {
+struct uniphier_sd_plat {
struct mmc_config cfg;
- struct mmc *mmc;
- struct udevice *dev;
+ struct mmc mmc;
+};
+
+struct uniphier_sd_priv {
void __iomem *regbase;
unsigned long mclk;
unsigned int version;
invalidate_dcache_range(addr, addr + size);
}
-static int uniphier_sd_check_error(struct uniphier_sd_priv *priv)
+static int uniphier_sd_check_error(struct udevice *dev)
{
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
u32 info2 = readl(priv->regbase + UNIPHIER_SD_INFO2);
if (info2 & UNIPHIER_SD_INFO2_ERR_RTO) {
* display error log since this might be a part of sequence to
* distinguish between SD and MMC.
*/
- return TIMEOUT;
+ return -ETIMEDOUT;
}
if (info2 & UNIPHIER_SD_INFO2_ERR_TO) {
- dev_err(priv->dev, "timeout error\n");
+ dev_err(dev, "timeout error\n");
return -ETIMEDOUT;
}
if (info2 & (UNIPHIER_SD_INFO2_ERR_END | UNIPHIER_SD_INFO2_ERR_CRC |
UNIPHIER_SD_INFO2_ERR_IDX)) {
- dev_err(priv->dev, "communication out of sync\n");
+ dev_err(dev, "communication out of sync\n");
return -EILSEQ;
}
if (info2 & (UNIPHIER_SD_INFO2_ERR_ILA | UNIPHIER_SD_INFO2_ERR_ILR |
UNIPHIER_SD_INFO2_ERR_ILW)) {
- dev_err(priv->dev, "illegal access\n");
+ dev_err(dev, "illegal access\n");
return -EIO;
}
return 0;
}
-static int uniphier_sd_wait_for_irq(struct uniphier_sd_priv *priv,
- unsigned int reg, u32 flag)
+static int uniphier_sd_wait_for_irq(struct udevice *dev, unsigned int reg,
+ u32 flag)
{
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
long wait = 1000000;
int ret;
while (!(readl(priv->regbase + reg) & flag)) {
if (wait-- < 0) {
- dev_err(priv->dev, "timeout\n");
+ dev_err(dev, "timeout\n");
return -ETIMEDOUT;
}
- ret = uniphier_sd_check_error(priv);
+ ret = uniphier_sd_check_error(dev);
if (ret)
return ret;
return 0;
}
-static int uniphier_sd_pio_read_one_block(struct mmc *mmc, u32 **pbuf,
+static int uniphier_sd_pio_read_one_block(struct udevice *dev, u32 **pbuf,
uint blocksize)
{
- struct uniphier_sd_priv *priv = mmc->priv;
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
int i, ret;
/* wait until the buffer is filled with data */
- ret = uniphier_sd_wait_for_irq(priv, UNIPHIER_SD_INFO2,
+ ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO2,
UNIPHIER_SD_INFO2_BRE);
if (ret)
return ret;
return 0;
}
-static int uniphier_sd_pio_write_one_block(struct mmc *mmc, const u32 **pbuf,
- uint blocksize)
+static int uniphier_sd_pio_write_one_block(struct udevice *dev,
+ const u32 **pbuf, uint blocksize)
{
- struct uniphier_sd_priv *priv = mmc->priv;
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
int i, ret;
/* wait until the buffer becomes empty */
- ret = uniphier_sd_wait_for_irq(priv, UNIPHIER_SD_INFO2,
+ ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO2,
UNIPHIER_SD_INFO2_BWE);
if (ret)
return ret;
return 0;
}
-static int uniphier_sd_pio_xfer(struct mmc *mmc, struct mmc_data *data)
+static int uniphier_sd_pio_xfer(struct udevice *dev, struct mmc_data *data)
{
u32 *dest = (u32 *)data->dest;
const u32 *src = (const u32 *)data->src;
for (i = 0; i < data->blocks; i++) {
if (data->flags & MMC_DATA_READ)
- ret = uniphier_sd_pio_read_one_block(mmc, &dest,
+ ret = uniphier_sd_pio_read_one_block(dev, &dest,
data->blocksize);
else
- ret = uniphier_sd_pio_write_one_block(mmc, &src,
+ ret = uniphier_sd_pio_write_one_block(dev, &src,
data->blocksize);
if (ret)
return ret;
writel(UNIPHIER_SD_DMA_CTL_START, priv->regbase + UNIPHIER_SD_DMA_CTL);
}
-static int uniphier_sd_dma_wait_for_irq(struct uniphier_sd_priv *priv, u32 flag,
+static int uniphier_sd_dma_wait_for_irq(struct udevice *dev, u32 flag,
unsigned int blocks)
{
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
long wait = 1000000 + 10 * blocks;
while (!(readl(priv->regbase + UNIPHIER_SD_DMA_INFO1) & flag)) {
if (wait-- < 0) {
- dev_err(priv->dev, "timeout during DMA\n");
+ dev_err(dev, "timeout during DMA\n");
return -ETIMEDOUT;
}
}
if (readl(priv->regbase + UNIPHIER_SD_DMA_INFO2)) {
- dev_err(priv->dev, "error during DMA\n");
+ dev_err(dev, "error during DMA\n");
return -EIO;
}
return 0;
}
-static int uniphier_sd_dma_xfer(struct mmc *mmc, struct mmc_data *data)
+static int uniphier_sd_dma_xfer(struct udevice *dev, struct mmc_data *data)
{
- struct uniphier_sd_priv *priv = mmc->priv;
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
size_t len = data->blocks * data->blocksize;
void *buf;
enum dma_data_direction dir;
uniphier_sd_dma_start(priv, dma_addr);
- ret = uniphier_sd_dma_wait_for_irq(priv, poll_flag, data->blocks);
+ ret = uniphier_sd_dma_wait_for_irq(dev, poll_flag, data->blocks);
__dma_unmap_single(dma_addr, len, dir);
return true;
}
-static int uniphier_sd_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+static int uniphier_sd_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,
struct mmc_data *data)
{
- struct uniphier_sd_priv *priv = mmc->priv;
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
int ret;
u32 tmp;
if (readl(priv->regbase + UNIPHIER_SD_INFO2) & UNIPHIER_SD_INFO2_CBSY) {
- dev_err(priv->dev, "command busy\n");
+ dev_err(dev, "command busy\n");
return -EBUSY;
}
tmp |= UNIPHIER_SD_CMD_RSP_R3;
break;
default:
- dev_err(priv->dev, "unknown response type\n");
+ dev_err(dev, "unknown response type\n");
return -EINVAL;
}
- dev_dbg(priv->dev, "sending CMD%d (SD_CMD=%08x, SD_ARG=%08x)\n",
+ dev_dbg(dev, "sending CMD%d (SD_CMD=%08x, SD_ARG=%08x)\n",
cmd->cmdidx, tmp, cmd->cmdarg);
writel(tmp, priv->regbase + UNIPHIER_SD_CMD);
- ret = uniphier_sd_wait_for_irq(priv, UNIPHIER_SD_INFO1,
+ ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO1,
UNIPHIER_SD_INFO1_RSP);
if (ret)
return ret;
/* use DMA if the HW supports it and the buffer is aligned */
if (priv->caps & UNIPHIER_SD_CAP_DMA_INTERNAL &&
uniphier_sd_addr_is_dmaable((long)data->src))
- ret = uniphier_sd_dma_xfer(mmc, data);
+ ret = uniphier_sd_dma_xfer(dev, data);
else
- ret = uniphier_sd_pio_xfer(mmc, data);
+ ret = uniphier_sd_pio_xfer(dev, data);
- ret = uniphier_sd_wait_for_irq(priv, UNIPHIER_SD_INFO1,
+ ret = uniphier_sd_wait_for_irq(dev, UNIPHIER_SD_INFO1,
UNIPHIER_SD_INFO1_CMP);
if (ret)
return ret;
return ret;
}
-static void uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,
- struct mmc *mmc)
+static int uniphier_sd_set_bus_width(struct uniphier_sd_priv *priv,
+ struct mmc *mmc)
{
u32 val, tmp;
val = UNIPHIER_SD_OPTION_WIDTH_8;
break;
default:
- BUG();
- break;
+ return -EINVAL;
}
tmp = readl(priv->regbase + UNIPHIER_SD_OPTION);
tmp &= ~UNIPHIER_SD_OPTION_WIDTH_MASK;
tmp |= val;
writel(tmp, priv->regbase + UNIPHIER_SD_OPTION);
+
+ return 0;
}
static void uniphier_sd_set_ddr_mode(struct uniphier_sd_priv *priv,
val = UNIPHIER_SD_CLKCTL_DIV1024;
tmp = readl(priv->regbase + UNIPHIER_SD_CLKCTL);
+ if (tmp & UNIPHIER_SD_CLKCTL_SCLKEN &&
+ (tmp & UNIPHIER_SD_CLKCTL_DIV_MASK) == val)
+ return;
/* stop the clock before changing its rate to avoid a glitch signal */
tmp &= ~UNIPHIER_SD_CLKCTL_SCLKEN;
tmp |= UNIPHIER_SD_CLKCTL_SCLKEN;
writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL);
+
+ udelay(1000);
}
-static void uniphier_sd_set_ios(struct mmc *mmc)
+static int uniphier_sd_set_ios(struct udevice *dev)
{
- struct uniphier_sd_priv *priv = mmc->priv;
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
+ struct mmc *mmc = mmc_get_mmc_dev(dev);
+ int ret;
- dev_dbg(priv->dev, "clock %uHz, DDRmode %d, width %u\n",
+ dev_dbg(dev, "clock %uHz, DDRmode %d, width %u\n",
mmc->clock, mmc->ddr_mode, mmc->bus_width);
- uniphier_sd_set_bus_width(priv, mmc);
+ ret = uniphier_sd_set_bus_width(priv, mmc);
+ if (ret)
+ return ret;
uniphier_sd_set_ddr_mode(priv, mmc);
uniphier_sd_set_clk_rate(priv, mmc);
- udelay(1000);
+ return 0;
+}
+
+static int uniphier_sd_get_cd(struct udevice *dev)
+{
+ struct uniphier_sd_priv *priv = dev_get_priv(dev);
+
+ if (priv->caps & UNIPHIER_SD_CAP_NONREMOVABLE)
+ return 1;
+
+ return !!(readl(priv->regbase + UNIPHIER_SD_INFO1) &
+ UNIPHIER_SD_INFO1_CD);
}
-static int uniphier_sd_init(struct mmc *mmc)
+static const struct dm_mmc_ops uniphier_sd_ops = {
+ .send_cmd = uniphier_sd_send_cmd,
+ .set_ios = uniphier_sd_set_ios,
+ .get_cd = uniphier_sd_get_cd,
+};
+
+static void uniphier_sd_host_init(struct uniphier_sd_priv *priv)
{
- struct uniphier_sd_priv *priv = mmc->priv;
u32 tmp;
/* soft reset of the host */
tmp |= UNIPHIER_SD_DMA_MODE_ADDR_INC;
writel(tmp, priv->regbase + UNIPHIER_SD_DMA_MODE);
}
-
- return 0;
}
-static int uniphier_sd_getcd(struct mmc *mmc)
+static int uniphier_sd_bind(struct udevice *dev)
{
- struct uniphier_sd_priv *priv = mmc->priv;
-
- if (priv->caps & UNIPHIER_SD_CAP_NONREMOVABLE)
- return 1;
+ struct uniphier_sd_plat *plat = dev_get_platdata(dev);
- return !!(readl(priv->regbase + UNIPHIER_SD_INFO1) &
- UNIPHIER_SD_INFO1_CD);
+ return mmc_bind(dev, &plat->mmc, &plat->cfg);
}
-static const struct mmc_ops uniphier_sd_ops = {
- .send_cmd = uniphier_sd_send_cmd,
- .set_ios = uniphier_sd_set_ios,
- .init = uniphier_sd_init,
- .getcd = uniphier_sd_getcd,
-};
-
-int uniphier_sd_probe(struct udevice *dev)
+static int uniphier_sd_probe(struct udevice *dev)
{
+ struct uniphier_sd_plat *plat = dev_get_platdata(dev);
struct uniphier_sd_priv *priv = dev_get_priv(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
fdt_addr_t base;
struct clk clk;
int ret;
- priv->dev = dev;
-
- base = dev_get_addr(dev);
+ base = devfdt_get_addr(dev);
if (base == FDT_ADDR_T_NONE)
return -EINVAL;
- priv->regbase = map_sysmem(base, SZ_2K);
+ priv->regbase = devm_ioremap(dev, base, SZ_2K);
if (!priv->regbase)
return -ENOMEM;
return ret;
}
- priv->cfg.name = dev->name;
- priv->cfg.ops = &uniphier_sd_ops;
- priv->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ plat->cfg.name = dev->name;
+ plat->cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS;
- switch (fdtdec_get_int(gd->fdt_blob, dev->of_offset, "bus-width", 1)) {
+ switch (fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), "bus-width",
+ 1)) {
case 8:
- priv->cfg.host_caps |= MMC_MODE_8BIT;
+ plat->cfg.host_caps |= MMC_MODE_8BIT;
break;
case 4:
- priv->cfg.host_caps |= MMC_MODE_4BIT;
+ plat->cfg.host_caps |= MMC_MODE_4BIT;
break;
case 1:
break;
return -EINVAL;
}
- if (fdt_get_property(gd->fdt_blob, dev->of_offset, "non-removable",
+ if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), "non-removable",
NULL))
priv->caps |= UNIPHIER_SD_CAP_NONREMOVABLE;
priv->caps |= UNIPHIER_SD_CAP_DIV1024;
}
- priv->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
- priv->cfg.f_min = priv->mclk /
- (priv->caps & UNIPHIER_SD_CAP_DIV1024 ? 1024 : 512);
- priv->cfg.f_max = priv->mclk;
- priv->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */
-
- priv->mmc = mmc_create(&priv->cfg, priv);
- if (!priv->mmc)
- return -EIO;
+ uniphier_sd_host_init(priv);
- upriv->mmc = priv->mmc;
- priv->mmc->dev = dev;
-
- return 0;
-}
-
-int uniphier_sd_remove(struct udevice *dev)
-{
- struct uniphier_sd_priv *priv = dev_get_priv(dev);
+ plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34;
+ plat->cfg.f_min = priv->mclk /
+ (priv->caps & UNIPHIER_SD_CAP_DIV1024 ? 1024 : 512);
+ plat->cfg.f_max = priv->mclk;
+ plat->cfg.b_max = U32_MAX; /* max value of UNIPHIER_SD_SECCNT */
- unmap_sysmem(priv->regbase);
- mmc_destroy(priv->mmc);
+ upriv->mmc = &plat->mmc;
return 0;
}
.name = "uniphier-mmc",
.id = UCLASS_MMC,
.of_match = uniphier_sd_match,
+ .bind = uniphier_sd_bind,
.probe = uniphier_sd_probe,
- .remove = uniphier_sd_remove,
.priv_auto_alloc_size = sizeof(struct uniphier_sd_priv),
+ .platdata_auto_alloc_size = sizeof(struct uniphier_sd_plat),
+ .ops = &uniphier_sd_ops,
};
projects / u-boot / blobdiff