#ifdef DEBUG
debug("long addr is at %p info->portwidth = %d\n", addr,
info->portwidth);
- for (x = 0; x < 4 * info->portwidth; x++) {
+ for (x = 0; x < 4 * info->portwidth; x++)
debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
- }
#endif
#if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
retval = ((flash_read8(addr) << 16) |
default:
retval = 0;
}
- debug("flash_is_busy: %d\n", retval);
+ debug("%s: %d\n", __func__, retval);
return retval;
}
case CFI_CMDSET_INTEL_PROG_REGIONS:
case CFI_CMDSET_INTEL_EXTENDED:
case CFI_CMDSET_INTEL_STANDARD:
- if ((retcode == ERR_OK)
- && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
+ if (retcode == ERR_OK &&
+ !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
retcode = ERR_INVAL;
printf("Flash %s error at address %lx\n", prompt,
info->start[sector]);
static flash_info_t *saved_info; /* previously used flash bank */
flash_sect_t sector = saved_sector;
- if ((info != saved_info) || (sector >= info->sector_count))
+ if (info != saved_info || sector >= info->sector_count)
sector = 0;
- while ((info->start[sector] < addr)
- && (sector < info->sector_count - 1))
+ while ((info->start[sector] < addr) &&
+ (sector < info->sector_count - 1))
sector++;
while ((info->start[sector] > addr) && (sector > 0))
/*
"write to buffer");
if (retcode == ERR_OK) {
/* reduce the number of loops by the width of
- * the port */
+ * the port
+ */
cnt = len >> shift;
flash_write_cmd(info, sector, 0, cnt - 1);
while (cnt-- > 0) {
puts("Can't erase unknown flash type - aborted\n");
return 1;
}
- if ((s_first < 0) || (s_first > s_last)) {
+ if (s_first < 0 || s_first > s_last) {
puts("- no sectors to erase\n");
return 1;
}
prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
+ for (sect = s_first; sect <= s_last; ++sect)
+ if (info->protect[sect])
prot++;
- }
- }
if (prot) {
printf("- Warning: %d protected sectors will not be erased!\n",
prot);
st = flash_status_poll(info, &cword, dest,
info->erase_blk_tout, "erase");
flash_unmap(info, sect, 0, dest);
- } else
+ } else {
st = flash_full_status_check(info, sect,
info->erase_blk_tout,
"erase");
+ }
+
if (st)
rcode = 1;
else if (flash_verbose)
printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
info->device_id2);
}
- if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
+ if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
printf("\n Advanced Sector Protection (PPB) enabled");
printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
info->erase_blk_tout,
#define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
if (flash_verbose) { \
dots -= dots_sub; \
- if ((scale > 0) && (dots <= 0)) { \
+ if (scale > 0 && dots <= 0) { \
if ((digit % 5) == 0) \
printf("%d", digit / 5); \
else \
#else
while (cnt >= info->portwidth) {
cword.w32 = 0;
- for (i = 0; i < info->portwidth; i++) {
+ for (i = 0; i < info->portwidth; i++)
flash_add_byte(info, &cword, *src++);
- }
if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
return rc;
wp += info->portwidth;
}
#endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
- if (cnt == 0) {
+ if (cnt == 0)
return (0);
- }
/*
* handle unaligned tail bytes
static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
{
- if (manufact_match(info, INTEL_MANUFACT)
- && info->device_id == NUMONYX_256MBIT) {
+ if (manufact_match(info, INTEL_MANUFACT) &&
+ info->device_id == NUMONYX_256MBIT) {
/*
* see errata called
* "Numonyx Axcell P33/P30 Specification Update" :)
* On some of Intel's flash chips (marked via legacy_unlock)
* unprotect unprotects all locking.
*/
- if ((prot == 0) && (info->legacy_unlock)) {
+ if (prot == 0 && info->legacy_unlock) {
flash_sect_t i;
for (i = 0; i < info->sector_count; i++) {
u32 tmp;
for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
- tmp = get_unaligned(&(qry->erase_region_info[i]));
- put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
- &(qry->erase_region_info[i]));
- put_unaligned(tmp, &(qry->erase_region_info[j]));
+ tmp = get_unaligned(&qry->erase_region_info[i]);
+ put_unaligned(get_unaligned(&qry->erase_region_info[j]),
+ &qry->erase_region_info[i]);
+ put_unaligned(tmp, &qry->erase_region_info[j]);
}
}
if (board_flash_get_legacy(base, banknum, info)) {
/* board code may have filled info completely. If not, we
- use JEDEC ID probing. */
+ * use JEDEC ID probing.
+ */
if (!info->vendor) {
int modes[] = {
CFI_CMDSET_AMD_STANDARD,
(ulong)map_physmem(base,
info->portwidth,
MAP_NOCACHE);
- if (info->portwidth == FLASH_CFI_8BIT
- && info->interface == FLASH_CFI_X8X16) {
+ if (info->portwidth == FLASH_CFI_8BIT &&
+ info->interface == FLASH_CFI_X8X16) {
info->addr_unlock1 = 0x2AAA;
info->addr_unlock2 = 0x5555;
} else {
cfi_offset++) {
flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
FLASH_CMD_CFI);
- if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
- && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
+ if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
+ flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
sizeof(struct cfi_qry));
info->interface = le16_to_cpu(qry->interface_desc);
* in compatibility mode
*/
if (/* x8/x16 in x8 mode */
- ((info->chipwidth == FLASH_CFI_BY8) &&
- (info->interface == FLASH_CFI_X8X16)) ||
+ (info->chipwidth == FLASH_CFI_BY8 &&
+ info->interface == FLASH_CFI_X8X16) ||
/* x16/x32 in x16 mode */
- ((info->chipwidth == FLASH_CFI_BY16) &&
- (info->interface == FLASH_CFI_X16X32)))
+ (info->chipwidth == FLASH_CFI_BY16 &&
+ info->interface == FLASH_CFI_X16X32))
{
info->addr_unlock1 = 0xaaa;
info->addr_unlock2 = 0x555;
* There's an app note from Numonyx on this issue.
* So adjust the buffer size for M29EW while operating in 8-bit mode
*/
- if (((qry->max_buf_write_size) > 0x8) &&
- (info->device_id == 0x7E) &&
+ if (qry->max_buf_write_size > 0x8 &&
+ info->device_id == 0x7E &&
(info->device_id2 == 0x2201 ||
info->device_id2 == 0x2301 ||
info->device_id2 == 0x2801 ||
info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
if (flash_detect_cfi(info, &qry)) {
- info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
- info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
+ info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
+ info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
num_erase_regions = qry.num_erase_regions;
if (info->ext_addr) {
size_ratio = info->portwidth / info->chipwidth;
/* if the chip is x8/x16 reduce the ratio by half */
- if ((info->interface == FLASH_CFI_X8X16)
- && (info->chipwidth == FLASH_CFI_BY8)) {
+ if (info->interface == FLASH_CFI_X8X16 &&
+ info->chipwidth == FLASH_CFI_BY8) {
size_ratio >>= 1;
}
debug("size_ratio %d port %d bits chip %d bits\n",
/* multiply the size by the number of chips */
info->size *= size_ratio;
max_size = cfi_flash_bank_size(banknum);
- if (max_size && (info->size > max_size)) {
+ if (max_size && info->size > max_size) {
debug("[truncated from %ldMiB]", info->size >> 20);
info->size = max_size;
}
}
tmp = le32_to_cpu(get_unaligned(
- &(qry.erase_region_info[i])));
+ &qry.erase_region_info[i]));
debug("erase region %u: 0x%08lx\n", i, tmp);
erase_region_count = (tmp & 0xffff) + 1;
/* round up when converting to ms */
info->write_tout = (tmp + 999) / 1000;
info->flash_id = FLASH_MAN_CFI;
- if ((info->interface == FLASH_CFI_X8X16) &&
- (info->chipwidth == FLASH_CFI_BY8)) {
+ if (info->interface == FLASH_CFI_X8X16 &&
+ info->chipwidth == FLASH_CFI_BY8) {
/* XXX - Need to test on x8/x16 in parallel. */
info->portwidth >>= 1;
}