fsl_elbc_nand: remove the bbt descriptors relocation fixup

[u-boot] / drivers / mtd / nand / fsl_elbc_nand.c

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index b097ca5abad58238eef283344c54e92f0c5928e3..146e9bf3cb6e9900c76d49a33d3e6b8c5b45a753 100644 (file)
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -662,7 +662,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
 
 static int fsl_elbc_read_page(struct mtd_info *mtd,
                              struct nand_chip *chip,
-                             uint8_t *buf)
+                             uint8_t *buf, int page)
 {
        fsl_elbc_read_buf(mtd, buf, mtd->writesize);
        fsl_elbc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
@@ -718,7 +718,7 @@ static void fsl_elbc_ctrl_init(void)
 int board_nand_init(struct nand_chip *nand)
 {
        struct fsl_elbc_mtd *priv;
-       uint32_t br, or;
+       uint32_t br = 0, or = 0;
 
        if (!elbc_ctrl) {
                fsl_elbc_ctrl_init();
@@ -737,11 +737,13 @@ int board_nand_init(struct nand_chip *nand)
         * if we could pass more than one datum to the NAND driver...
         */
        for (priv->bank = 0; priv->bank < MAX_BANKS; priv->bank++) {
+               phys_addr_t base_addr = virt_to_phys(nand->IO_ADDR_R);
+
                br = in_be32(&elbc_ctrl->regs->bank[priv->bank].br);
                or = in_be32(&elbc_ctrl->regs->bank[priv->bank].or);
 
                if ((br & BR_V) && (br & BR_MSEL) == BR_MS_FCM &&
-                   (br & or & BR_BA) == (phys_addr_t)nand->IO_ADDR_R)
+                   (br & or & BR_BA) == BR_PHYS_ADDR(base_addr))
                        break;
        }
 
@@ -777,6 +779,20 @@ int board_nand_init(struct nand_chip *nand)
        nand->ecc.read_page = fsl_elbc_read_page;
        nand->ecc.write_page = fsl_elbc_write_page;
 
+#ifdef CONFIG_FSL_ELBC_FMR
+       priv->fmr = CONFIG_FSL_ELBC_FMR;
+#else
+       priv->fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT);
+
+       /*
+        * Hardware expects small page has ECCM0, large page has ECCM1
+        * when booting from NAND.  Board config can override if not
+        * booting from NAND.
+        */
+       if (or & OR_FCM_PGS)
+               priv->fmr |= FMR_ECCM;
+#endif
+
        /* If CS Base Register selects full hardware ECC then use it */
        if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
                nand->ecc.mode = NAND_ECC_HW;
@@ -793,8 +809,6 @@ int board_nand_init(struct nand_chip *nand)
                nand->ecc.mode = NAND_ECC_SOFT;
        }
 
-       priv->fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT);
-
        /* Large-page-specific setup */
        if (or & OR_FCM_PGS) {
                priv->page_size = 1;