Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

[u-boot] / drivers / mtd / nand / fsmc_nand.c

diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 567eff09140f4f091052e4472351ec382497e794..e0e9e1ebd03104715c78a483a2cb0cb98fdd45fe 100644 (file)
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -390,6 +390,55 @@ static int fsmc_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
        return 0;
 }
 
+#ifndef CONFIG_SPL_BUILD
+/*
+ * fsmc_nand_switch_ecc - switch the ECC operation between different engines
+ *
+ * @eccstrength                - the number of bits that could be corrected
+ *                       (1 - HW, 4 - SW BCH4)
+ */
+int fsmc_nand_switch_ecc(uint32_t eccstrength)
+{
+       struct nand_chip *nand;
+       struct mtd_info *mtd;
+       int err;
+
+       /*
+        * This functions is only called on SPEAr600 platforms, supporting
+        * 1 bit HW ECC. The BCH8 HW ECC (FSMC_VER8) from the ST-Ericsson
+        * Nomadik SoC is currently supporting this fsmc_nand_switch_ecc()
+        * function, as it doesn't need to switch to a different ECC layout.
+        */
+       mtd = &nand_info[nand_curr_device];
+       nand = mtd->priv;
+
+       /* Setup the ecc configurations again */
+       if (eccstrength == 1) {
+               nand->ecc.mode = NAND_ECC_HW;
+               nand->ecc.bytes = 3;
+               nand->ecc.strength = 1;
+               nand->ecc.layout = &fsmc_ecc1_layout;
+               nand->ecc.calculate = fsmc_read_hwecc;
+               nand->ecc.correct = nand_correct_data;
+       } else if (eccstrength == 4) {
+               /*
+                * .calculate .correct and .bytes will be set in
+                * nand_scan_tail()
+                */
+               nand->ecc.mode = NAND_ECC_SOFT_BCH;
+               nand->ecc.strength = 4;
+               nand->ecc.layout = NULL;
+       } else {
+               printf("Error: ECC strength %d not supported!\n", eccstrength);
+       }
+
+       /* Update NAND handling after ECC mode switch */
+       err = nand_scan_tail(mtd);
+
+       return err;
+}
+#endif /* CONFIG_SPL_BUILD */
+
 int fsmc_nand_init(struct nand_chip *nand)
 {
        static int chip_nr;