#define DRIVER_NAME "mxc_nand"
struct mxc_nand_host {
- struct mtd_info mtd;
struct nand_chip *nand;
struct mxc_nand_regs __iomem *regs;
static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
uint16_t tmp = readnfc(&host->regs->config1);
struct nand_chip *chip,
int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
uint8_t *buf = chip->oob_poi;
int length = mtd->oobsize;
int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
int oob_required,
int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
int eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
int oob_required,
int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
int n, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
static int mxc_nand_write_oob_syndrome(struct mtd_info *mtd,
struct nand_chip *chip, int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
int length = mtd->oobsize;
int i, len, status, steps = chip->ecc.steps;
static int mxc_nand_write_page_raw_syndrome(struct mtd_info *mtd,
struct nand_chip *chip,
const uint8_t *buf,
- int oob_required)
+ int oob_required, int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
int eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
static int mxc_nand_write_page_syndrome(struct mtd_info *mtd,
struct nand_chip *chip,
const uint8_t *buf,
- int oob_required)
+ int oob_required, int page)
{
- struct mxc_nand_host *host = chip->priv;
+ struct mxc_nand_host *host = nand_get_controller_data(chip);
int i, n, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
uint32_t ecc_status = readl(&host->regs->ecc_status_result);
int subpages = mtd->writesize / nand_chip->subpagesize;
int pg2blk_shift = nand_chip->phys_erase_shift -
mtd->writesize / nand_chip->subpagesize
- subpages);
}
- return -1;
+ return -EBADMSG;
}
ecc_status >>= 4;
subpages--;
static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *calc_ecc)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
/*
* 1-Bit errors are automatically corrected in HW. No need for
if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
MTDDEBUG(MTD_DEBUG_LEVEL0,
"MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
- return -1;
+ return -EBADMSG;
}
return 0;
static u_char mxc_nand_read_byte(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
uint8_t ret = 0;
uint16_t col;
uint16_t __iomem *main_buf =
static uint16_t mxc_nand_read_word(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
uint16_t col, ret;
uint16_t __iomem *p;
static void mxc_nand_write_buf(struct mtd_info *mtd,
const u_char *buf, int len)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
int n, col, i = 0;
MTDDEBUG(MTD_DEBUG_LEVEL3,
*/
static void mxc_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
int n, col, i = 0;
MTDDEBUG(MTD_DEBUG_LEVEL3,
*/
static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
switch (chip) {
case -1:
void mxc_nand_command(struct mtd_info *mtd, unsigned command,
int column, int page_addr)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct mxc_nand_host *host = nand_get_controller_data(nand_chip);
MTDDEBUG(MTD_DEBUG_LEVEL3,
"mxc_nand_command (cmd = 0x%x, col = 0x%x, page = 0x%x)\n",
#endif
/* structures must be linked */
- mtd = &host->mtd;
- mtd->priv = this;
+ mtd = &this->mtd;
host->nand = this;
/* 5 us command delay time */
this->chip_delay = 5;
- this->priv = host;
+ nand_set_controller_data(this, host);
this->dev_ready = mxc_nand_dev_ready;
this->cmdfunc = mxc_nand_command;
this->select_chip = mxc_nand_select_chip;