Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx

[u-boot] / drivers / mtd / nand / mxc_nand.c

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 62d69650638ba277774f1db7b2a51b47787e3aa0..eeba521942b78e76e0887e7648c8681b9019172b 100644 (file)
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -26,19 +26,17 @@
        defined(CONFIG_MX51) || defined(CONFIG_MX53)
 #include <asm/arch/imx-regs.h>
 #endif
-#include <fsl_nfc.h>
+#include "mxc_nand.h"
 
 #define DRIVER_NAME "mxc_nand"
 
-typedef enum {false, true} bool;
-
 struct mxc_nand_host {
        struct mtd_info                 mtd;
        struct nand_chip                *nand;
 
-       struct fsl_nfc_regs __iomem     *regs;
+       struct mxc_nand_regs __iomem    *regs;
 #ifdef MXC_NFC_V3_2
-       struct fsl_nfc_ip_regs __iomem  *ip_regs;
+       struct mxc_nand_ip_regs __iomem *ip_regs;
 #endif
        int                             spare_only;
        int                             status_request;
@@ -463,7 +461,7 @@ static int mxc_nand_read_page_raw_syndrome(struct mtd_info *mtd,
        int n;
 
        _mxc_nand_enable_hwecc(mtd, 0);
-       chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, host->page_addr);
+       chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 
        for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
                host->col_addr = n * eccsize;
@@ -507,7 +505,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
        uint8_t *oob = chip->oob_poi;
 
        MTDDEBUG(MTD_DEBUG_LEVEL1, "Reading page %u to buf %p oob %p\n",
-             host->page_addr, buf, oob);
+             page, buf, oob);
 
        /* first read the data area and the available portion of OOB */
        for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -545,7 +543,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
 
        /* Then switch ECC off and read the OOB area to get the ECC code */
        _mxc_nand_enable_hwecc(mtd, 0);
-       chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, host->page_addr);
+       chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
        eccsteps = chip->ecc.steps;
        oob = chip->oob_poi + chip->ecc.prepad;
        for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -1213,10 +1211,10 @@ int board_nand_init(struct nand_chip *this)
        this->read_buf = mxc_nand_read_buf;
        this->verify_buf = mxc_nand_verify_buf;
 
-       host->regs = (struct fsl_nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
+       host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
 #ifdef MXC_NFC_V3_2
        host->ip_regs =
-               (struct fsl_nfc_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
+               (struct mxc_nand_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
 #endif
        host->clk_act = 1;