Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

[u-boot] / drivers / mtd / nand / mxs_nand.c

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index c21fd692c2f39ada41e01746a68522149e92caee..398e4ddc1558a8945bc53eb58b98c6c8c2fc1b4b 100644 (file)
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -42,6 +42,11 @@
 #define        MXS_NAND_DMA_DESCRIPTOR_COUNT           4
 
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE          512
+#if defined(CONFIG_MX6)
+#define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    2
+#else
+#define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    0
+#endif
 #define        MXS_NAND_METADATA_SIZE                  10
 
 #define        MXS_NAND_COMMAND_BUFFER_SIZE            32
@@ -982,14 +987,16 @@ static int mxs_nand_scan_bbt(struct mtd_info *mtd)
        tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
        tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
                << BCH_FLASHLAYOUT0_ECC0_OFFSET;
-       tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+       tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+               >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
        writel(tmp, &bch_regs->hw_bch_flash0layout0);
 
        tmp = (mtd->writesize + mtd->oobsize)
                << BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
        tmp |= (mxs_nand_get_ecc_strength(mtd->writesize, mtd->oobsize) >> 1)
                << BCH_FLASHLAYOUT1_ECCN_OFFSET;
-       tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE;
+       tmp |= MXS_NAND_CHUNK_DATA_CHUNK_SIZE
+               >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
        writel(tmp, &bch_regs->hw_bch_flash0layout1);
 
        /* Set *all* chip selects to use layout 0 */