spi: Correct device tree usage in spi_flash_decode_fdt()

[u-boot] / drivers / mtd / nand / mxs_nand.c

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 33ce8174dc1b8e238770c254f5254cca8374974d..f15cf36c88e713f1fd38de5648e38410f0611441 100644 (file)
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -149,6 +149,13 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
                                                uint32_t page_oob_size)
 {
        int ecc_strength;
+       int max_ecc_strength_supported;
+
+       /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+       if (is_cpu_type(MXC_CPU_MX6SX))
+               max_ecc_strength_supported = 62;
+       else
+               max_ecc_strength_supported = 40;
 
        /*
         * Determine the ECC layout with the formula:
@@ -162,7 +169,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
                        / (galois_field *
                           mxs_nand_ecc_chunk_cnt(page_data_size));
 
-       return round_down(ecc_strength, 2);
+       return min(round_down(ecc_strength, 2), max_ecc_strength_supported);
 }
 
 static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
@@ -462,6 +469,9 @@ static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int length)
 
        mxs_dma_desc_append(channel, d);
 
+       /* Invalidate caches */
+       mxs_nand_inval_data_buf(nand_info);
+
        /* Execute the DMA chain. */
        ret = mxs_dma_go(channel);
        if (ret) {
@@ -628,6 +638,9 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 
        mxs_dma_desc_append(channel, d);
 
+       /* Invalidate caches */
+       mxs_nand_inval_data_buf(nand_info);
+
        /* Execute the DMA chain. */
        ret = mxs_dma_go(channel);
        if (ret) {