NAND: Updating comments/explanations in the NAND driver

[u-boot] / drivers / mtd / nand / nand_base.c

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 426bb95e9e9f10f62b13e2877428370158daa3d9..cfd582af9d5a2cef2fffbd8783a49863fc2955d8 100644 (file)
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -893,6 +893,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this)
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
  * @buf:       buffer to store read data
+ * @page:      page number to read
  */
 static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
                              uint8_t *buf, int page)
@@ -907,6 +908,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
  * @buf:       buffer to store read data
+ * @page:      page number to read
  */
 static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
                                uint8_t *buf, int page)
@@ -946,9 +948,9 @@ static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
  * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
- * @dataofs    offset of requested data within the page
- * @readlen    data length
- * @buf:       buffer to store read data
+ * @data_offs: offset of requested data within the page
+ * @readlen:   data length
+ * @bufpoi:    buffer to store read data
  */
 static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint32_t data_offs, uint32_t readlen, uint8_t *bufpoi)
 {
@@ -1028,6 +1030,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
  * @buf:       buffer to store read data
+ * @page:      page number to read
  *
  * Not for syndrome calculating ecc controllers which need a special oob layout
  */
@@ -1072,6 +1075,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
  * @buf:       buffer to store read data
+ * @page:      page number to read
  *
  * Hardware ECC for large page chips, require OOB to be read first.
  * For this ECC mode, the write_page method is re-used from ECC_HW.
@@ -1120,6 +1124,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
  * @mtd:       mtd info structure
  * @chip:      nand chip info structure
  * @buf:       buffer to store read data
+ * @page:      page number to read
  *
  * The hw generator calculates the error syndrome automatically. Therefor
  * we need a special oob layout and handling.
@@ -2211,13 +2216,15 @@ static int nand_erase(struct mtd_info *mtd, struct erase_info *instr)
 int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
                    int allowbbt)
 {
-       int page, len, status, pages_per_block, ret, chipnr;
+       int page, status, pages_per_block, ret, chipnr;
        struct nand_chip *chip = mtd->priv;
-       int rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS]={0};
+       loff_t rewrite_bbt[CONFIG_SYS_NAND_MAX_CHIPS] = {0};
        unsigned int bbt_masked_page = 0xffffffff;
+       loff_t len;
 
-       MTDDEBUG (MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n",
-                 (unsigned int) instr->addr, (unsigned int) instr->len);
+       MTDDEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%012llx, "
+                "len = %llu\n", (unsigned long long) instr->addr,
+                (unsigned long long) instr->len);
 
        /* Start address must align on block boundary */
        if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) {
@@ -2313,7 +2320,7 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
                        MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase: "
                                  "Failed erase, page 0x%08x\n", page);
                        instr->state = MTD_ERASE_FAILED;
-                       instr->fail_addr = (page << chip->page_shift);
+                       instr->fail_addr = ((loff_t)page << chip->page_shift);
                        goto erase_exit;
                }
 
@@ -2323,7 +2330,8 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
                 */
                if (bbt_masked_page != 0xffffffff &&
                    (page & BBT_PAGE_MASK) == bbt_masked_page)
-                           rewrite_bbt[chipnr] = (page << chip->page_shift);
+                       rewrite_bbt[chipnr] =
+                               ((loff_t)page << chip->page_shift);
 
                /* Increment page address and decrement length */
                len -= (1 << chip->phys_erase_shift);
@@ -2370,8 +2378,8 @@ int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr,
                        continue;
                /* update the BBT for chip */
                MTDDEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt "
-                         "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
-                         chip->bbt_td->pages[chipnr]);
+                         "(%d:0x%0llx 0x%0x)\n", chipnr, rewrite_bbt[chipnr],
+                         chip->bbt_td->pages[chipnr]);
                nand_update_bbt(mtd, rewrite_bbt[chipnr]);
        }
 
@@ -2566,7 +2574,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
        if (!mtd->name)
                mtd->name = type->name;
 
-       chip->chipsize = type->chipsize << 20;
+       chip->chipsize = (uint64_t)type->chipsize << 20;
 
        /* Newer devices have all the information in additional id bytes */
        if (!type->pagesize) {
@@ -2624,7 +2632,10 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd,
 
        chip->bbt_erase_shift = chip->phys_erase_shift =
                ffs(mtd->erasesize) - 1;
-       chip->chip_shift = ffs(chip->chipsize) - 1;
+       if (chip->chipsize & 0xffffffff)
+               chip->chip_shift = ffs((unsigned)chip->chipsize) - 1;
+       else
+               chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 31;
 
        /* Set the bad block position */
        chip->badblockpos = mtd->writesize > 512 ?
@@ -2722,7 +2733,6 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips)
 /**
  * nand_scan_tail - [NAND Interface] Scan for the NAND device
  * @mtd:           MTD device structure
- * @maxchips:      Number of chips to scan for
  *
  * This is the second phase of the normal nand_scan() function. It
  * fills out all the uninitialized function pointers with the defaults
@@ -2761,7 +2771,6 @@ int nand_scan_tail(struct mtd_info *mtd)
                default:
                        printk(KERN_WARNING "No oob scheme defined for "
                               "oobsize %d\n", mtd->oobsize);
-/*                     BUG(); */
                }
        }
 
@@ -2890,6 +2899,7 @@ int nand_scan_tail(struct mtd_info *mtd)
                        break;
                case 4:
                case 8:
+               case 16:
                        mtd->subpage_sft = 2;
                        break;
                }