+// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2016 Xilinx, Inc.
*
* Xilinx Zynq NAND Flash Controller Driver
* This driver is based on plat_nand.c and mxc_nand.c drivers
- *
- * SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <linux/errno.h>
#include <nand.h>
#include <linux/mtd/mtd.h>
-#include <linux/mtd/nand.h>
+#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/nand_ecc.h>
#include <asm/arch/hardware.h>
#define ZYNQ_NAND_ECC_BUSY (1 << 6) /* ECC block is busy */
#define ZYNQ_NAND_ECC_MASK 0x00FFFFFF /* ECC value mask */
+#ifndef NAND_CMD_LOCK_TIGHT
+#define NAND_CMD_LOCK_TIGHT 0x2c
+#endif
+
+#ifndef NAND_CMD_LOCK_STATUS
+#define NAND_CMD_LOCK_STATUS 0x7a
+#endif
/* SMC register set */
struct zynq_nand_smc_regs {
{NAND_CMD_PARAM, NAND_CMD_NONE, 1, 0},
{NAND_CMD_GET_FEATURES, NAND_CMD_NONE, 1, 0},
{NAND_CMD_SET_FEATURES, NAND_CMD_NONE, 1, 0},
+ {NAND_CMD_LOCK, NAND_CMD_NONE, 0, 0},
+ {NAND_CMD_LOCK_TIGHT, NAND_CMD_NONE, 0, 0},
+ {NAND_CMD_UNLOCK1, NAND_CMD_NONE, 3, 0},
+ {NAND_CMD_UNLOCK2, NAND_CMD_NONE, 3, 0},
+ {NAND_CMD_LOCK_STATUS, NAND_CMD_NONE, 3, 0},
{NAND_CMD_NONE, NAND_CMD_NONE, 0, 0},
/* Add all the flash commands supported by the flash device */
};
}
xnand->nand_base = (void __iomem *)ZYNQ_NAND_BASEADDR;
- mtd = get_nand_dev_by_index(0);
+ mtd = nand_to_mtd(nand_chip);
nand_chip->priv = xnand;
mtd->priv = nand_chip;