*/
#include <common.h>
+#include <fdtdec.h>
#include <malloc.h>
#include <spi.h>
#include <spi_flash.h>
#include "spi_flash_internal.h"
+DECLARE_GLOBAL_DATA_PTR;
+
static void spi_flash_addr(u32 addr, u8 *cmd)
{
/* cmd[0] is actual command */
int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
size_t len, const void *buf)
{
- unsigned long page_addr, byte_addr, page_size;
+ unsigned long byte_addr, page_size;
size_t chunk_len, actual;
int ret;
u8 cmd[4];
page_size = flash->page_size;
- page_addr = offset / page_size;
- byte_addr = offset % page_size;
ret = spi_claim_bus(flash->spi);
if (ret) {
cmd[0] = CMD_PAGE_PROGRAM;
for (actual = 0; actual < len; actual += chunk_len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+ u8 bank_sel;
+
+ bank_sel = offset / SPI_FLASH_16MB_BOUN;
+
+ ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+ if (ret) {
+ debug("SF: fail to set bank%d\n", bank_sel);
+ return ret;
+ }
+#endif
+ byte_addr = offset % page_size;
chunk_len = min(len - actual, page_size - byte_addr);
- cmd[1] = page_addr >> 8;
- cmd[2] = page_addr;
- cmd[3] = byte_addr;
+ if (flash->spi->max_write_size)
+ chunk_len = min(chunk_len, flash->spi->max_write_size);
+
+ spi_flash_addr(offset, cmd);
debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
if (ret)
break;
- page_addr++;
- byte_addr = 0;
+ offset += chunk_len;
}
- debug("SF: program %s %zu bytes @ %#x\n",
- ret ? "failure" : "success", len, offset);
-
spi_release_bus(flash->spi);
return ret;
}
int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
size_t len, void *data)
{
- u8 cmd[5];
+ u8 cmd[5], bank_sel = 0;
+ u32 remain_len, read_len;
+ int ret = -1;
+
+ /* Handle memory-mapped SPI */
+ if (flash->memory_map) {
+ memcpy(data, flash->memory_map + offset, len);
+ return 0;
+ }
cmd[0] = CMD_READ_ARRAY_FAST;
- spi_flash_addr(offset, cmd);
cmd[4] = 0x00;
- return spi_flash_read_common(flash, cmd, sizeof(cmd), data, len);
+ while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+ bank_sel = offset / SPI_FLASH_16MB_BOUN;
+
+ ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+ if (ret) {
+ debug("SF: fail to set bank%d\n", bank_sel);
+ return ret;
+ }
+#endif
+ remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
+ if (len < remain_len)
+ read_len = len;
+ else
+ read_len = remain_len;
+
+ spi_flash_addr(offset, cmd);
+
+ ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
+ data, read_len);
+ if (ret < 0) {
+ debug("SF: read failed\n");
+ break;
+ }
+
+ offset += read_len;
+ len -= read_len;
+ data += read_len;
+ }
+
+ return ret;
}
int spi_flash_cmd_poll_bit(struct spi_flash *flash, unsigned long timeout,
CMD_READ_STATUS, STATUS_WIP);
}
-int spi_flash_cmd_erase(struct spi_flash *flash, u8 erase_cmd,
- u32 offset, size_t len)
+int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
{
- u32 start, end, erase_size;
+ u32 erase_size;
int ret;
u8 cmd[4];
return ret;
}
- cmd[0] = erase_cmd;
- start = offset;
- end = start + len;
+ if (erase_size == 4096)
+ cmd[0] = CMD_ERASE_4K;
+ else
+ cmd[0] = CMD_ERASE_64K;
+
+ while (len) {
+#ifdef CONFIG_SPI_FLASH_BAR
+ u8 bank_sel;
+
+ bank_sel = offset / SPI_FLASH_16MB_BOUN;
- while (offset < end) {
+ ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
+ if (ret) {
+ debug("SF: fail to set bank%d\n", bank_sel);
+ return ret;
+ }
+#endif
spi_flash_addr(offset, cmd);
- offset += erase_size;
debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
cmd[2], cmd[3], offset);
ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
if (ret)
goto out;
- }
- debug("SF: Successfully erased %zu bytes @ %#x\n",
- len * erase_size, start);
+ offset += erase_size;
+ len -= erase_size;
+ }
out:
spi_release_bus(flash->spi);
return ret;
}
+int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
+{
+ u8 cmd;
+ int ret;
+
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret < 0) {
+ debug("SF: enabling write failed\n");
+ return ret;
+ }
+
+ cmd = CMD_WRITE_STATUS;
+ ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &sr, 1);
+ if (ret) {
+ debug("SF: fail to write status register\n");
+ return ret;
+ }
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret < 0) {
+ debug("SF: write status register timed out\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_SPI_FLASH_BAR
+int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
+{
+ u8 cmd;
+ int ret;
+
+ if (flash->bank_curr == bank_sel) {
+ debug("SF: not require to enable bank%d\n", bank_sel);
+ return 0;
+ }
+
+ cmd = flash->bank_write_cmd;
+ ret = spi_flash_cmd_write_enable(flash);
+ if (ret < 0) {
+ debug("SF: enabling write failed\n");
+ return ret;
+ }
+
+ ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &bank_sel, 1);
+ if (ret) {
+ debug("SF: fail to write bank addr register\n");
+ return ret;
+ }
+ flash->bank_curr = bank_sel;
+
+ ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret < 0) {
+ debug("SF: write bank addr register timed out\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
+{
+ u8 cmd;
+ u8 curr_bank = 0;
+
+ /* discover bank cmds */
+ switch (idcode0) {
+ case SPI_FLASH_SPANSION_IDCODE0:
+ flash->bank_read_cmd = CMD_BANKADDR_BRRD;
+ flash->bank_write_cmd = CMD_BANKADDR_BRWR;
+ break;
+ case SPI_FLASH_STMICRO_IDCODE0:
+ case SPI_FLASH_WINBOND_IDCODE0:
+ flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
+ flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
+ break;
+ default:
+ printf("SF: Unsupported bank commands %02x\n", idcode0);
+ return -1;
+ }
+
+ /* read the bank reg - on which bank the flash is in currently */
+ cmd = flash->bank_read_cmd;
+ if (flash->size > SPI_FLASH_16MB_BOUN) {
+ if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
+ debug("SF: fail to read bank addr register\n");
+ return -1;
+ }
+ flash->bank_curr = curr_bank;
+ } else {
+ flash->bank_curr = curr_bank;
+ }
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_OF_CONTROL
+int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
+{
+ fdt_addr_t addr;
+ fdt_size_t size;
+ int node;
+
+ /* If there is no node, do nothing */
+ node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
+ if (node < 0)
+ return 0;
+
+ addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
+ if (addr == FDT_ADDR_T_NONE) {
+ debug("%s: Cannot decode address\n", __func__);
+ return 0;
+ }
+
+ if (flash->size != size) {
+ debug("%s: Memory map must cover entire device\n", __func__);
+ return -1;
+ }
+ flash->memory_map = (void *)addr;
+
+ return 0;
+}
+#endif /* CONFIG_OF_CONTROL */
+
/*
* The following table holds all device probe functions
*
goto err_manufacturer_probe;
}
+#ifdef CONFIG_SPI_FLASH_BAR
+ /* Configure the BAR - disover bank cmds and read current bank */
+ ret = spi_flash_bank_config(flash, *idp);
+ if (ret < 0)
+ goto err_manufacturer_probe;
+#endif
+
+#ifdef CONFIG_OF_CONTROL
+ if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
+ debug("SF: FDT decode error\n");
+ goto err_manufacturer_probe;
+ }
+#endif
printf("SF: Detected %s with page size ", flash->name);
print_size(flash->sector_size, ", total ");
- print_size(flash->size, "\n");
+ print_size(flash->size, "");
+ if (flash->memory_map)
+ printf(", mapped at %p", flash->memory_map);
+ puts("\n");
spi_release_bus(spi);
return NULL;
}
+void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
+ const char *name)
+{
+ struct spi_flash *flash;
+ void *ptr;
+
+ ptr = malloc(size);
+ if (!ptr) {
+ debug("SF: Failed to allocate memory\n");
+ return NULL;
+ }
+ memset(ptr, '\0', size);
+ flash = (struct spi_flash *)(ptr + offset);
+
+ /* Set up some basic fields - caller will sort out sizes */
+ flash->spi = spi;
+ flash->name = name;
+
+ flash->read = spi_flash_cmd_read_fast;
+ flash->write = spi_flash_cmd_write_multi;
+ flash->erase = spi_flash_cmd_erase;
+
+ return flash;
+}
+
void spi_flash_free(struct spi_flash *flash)
{
spi_free_slave(flash->spi);
projects / u-boot / blobdiff